diff mbox series

perf/arm-cmn: Reset DTM_PMU_CONFIG at probe

Message ID ba5f38b3dc733cd06bfb5e659b697e76d18c2183.1670269572.git.robin.murphy@arm.com (mailing list archive)
State New, archived
Headers show
Series perf/arm-cmn: Reset DTM_PMU_CONFIG at probe | expand

Commit Message

Robin Murphy Dec. 5, 2022, 7:46 p.m. UTC
Although we treat the DTM counters as free-running such that we're not
too concerned about the initial DTM state, it's possible for a previous
user to have left DTM counters enabled and paired with DTC counters.
Thus if the first events are scheduled using some, but not all, DTMs,
the as-yet-unused ones could end up adding spurious increments to the
event counts at the DTC. Make sure we sync our initial DTM_PMU_CONFIG
state to all the DTMs at probe time to avoid that possibility.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
 drivers/perf/arm-cmn.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Will Deacon Jan. 19, 2023, 7:08 p.m. UTC | #1
On Mon, 5 Dec 2022 19:46:13 +0000, Robin Murphy wrote:
> Although we treat the DTM counters as free-running such that we're not
> too concerned about the initial DTM state, it's possible for a previous
> user to have left DTM counters enabled and paired with DTC counters.
> Thus if the first events are scheduled using some, but not all, DTMs,
> the as-yet-unused ones could end up adding spurious increments to the
> event counts at the DTC. Make sure we sync our initial DTM_PMU_CONFIG
> state to all the DTMs at probe time to avoid that possibility.
> 
> [...]

Applied to will (for-next/perf), thanks!

[1/1] perf/arm-cmn: Reset DTM_PMU_CONFIG at probe
      https://git.kernel.org/will/c/bb21ef19a3d8

Cheers,
diff mbox series

Patch

diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c
index 0b2df72cee9f..81b0dfd511aa 100644
--- a/drivers/perf/arm-cmn.c
+++ b/drivers/perf/arm-cmn.c
@@ -1862,6 +1862,7 @@  static void arm_cmn_init_dtm(struct arm_cmn_dtm *dtm, struct arm_cmn_node *xp, i
 
 	dtm->base = xp->pmu_base + CMN_DTM_OFFSET(idx);
 	dtm->pmu_config_low = CMN_DTM_PMU_CONFIG_PMU_EN;
+	writeq_relaxed(dtm->pmu_config_low, dtm->base + CMN_DTM_PMU_CONFIG);
 	for (i = 0; i < 4; i++) {
 		dtm->wp_event[i] = -1;
 		writeq_relaxed(0, dtm->base + CMN_DTM_WPn_MASK(i));