diff mbox series

[v2,4/6] ARM: dts: BCM5301X: Specify pcie2 in the DT

Message ID c7e6c85f7298df3276351c87658117b2b086d1cf.1598111680.git.chunkeey@gmail.com (mailing list archive)
State New, archived
Headers show
Series ARM: BCM5301X: add Meraki MR32 series | expand

Commit Message

Christian Lamparter Aug. 22, 2020, 4:19 p.m. UTC 
The SoC supports three pcie ports. Currently, only
pcie0 and pcie1 are enabled. This patch adds the
pcie2 port as well.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
---
 arch/arm/boot/dts/bcm5301x.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Florian Fainelli Aug. 27, 2020, 12:03 a.m. UTC | #1 
On Sat, 22 Aug 2020 18:19:21 +0200, Christian Lamparter <chunkeey@gmail.com> wrote:
> The SoC supports three pcie ports. Currently, only
> pcie0 and pcie1 are enabled. This patch adds the
> pcie2 port as well.
> 
> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
> Reviewed-by: Scott Branden <scott.branden@broadcom.com>
> ---

Applied to devicetree/next, thanks!
--
Florian
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index eb1290fed235..9d9e8fe3f6ae 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -252,6 +252,10 @@  pcie1: pcie@13000 {
 			reg = <0x00013000 0x1000>;
 		};
 
+		pcie2: pcie@14000 {
+			reg = <0x00014000 0x1000>;
+		};
+
 		usb2: usb2@21000 {
 			reg = <0x00021000 0x1000>;