From patchwork Sat Oct 27 09:17:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 1654661 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 41FCA3FD4F for ; Sat, 27 Oct 2012 09:20:27 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TS2XL-0007KF-JG; Sat, 27 Oct 2012 09:18:35 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TS2X1-0007Hp-9T for linux-arm-kernel@lists.infradead.org; Sat, 27 Oct 2012 09:18:16 +0000 Received: by mail-pa0-f49.google.com with SMTP id bi5so2226901pad.36 for ; Sat, 27 Oct 2012 02:18:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=8NfX+QWAer8Jd946V2lCXyemlLUz9MNoUCTvYOY3hh4=; b=bu+wS/AOZz1ER+ndF8l/0lshKyGYzjoD8I0BJFkVJ42IEgLLchAnbFtkIubCc8C977 qFm3ffLspNPzLtjABFzmfm0nieu9JX5zneRUqkLa0hwunmbpYcSTuAYeej4EeZmCQa5/ ycPd8/oDXuhg8MPCD43KkNNiUbgoHBTdqx/sHCEdGNGatiHwJcWgmT/RgRhae75piidm 2hql9T3CmTOx7k2myj8apmAlaC2xNAp1JUKZSdzPXJTU5uc6XL4tevgqWBELyaXfV8mC Wv/tH0So6x0q2Fd1ZkPXB5z1iRmGV852D3izYe4c4TuKO+sVT1WP5Snqcf1MQbMkWPrt NaKA== Received: by 10.68.232.163 with SMTP id tp3mr77217907pbc.44.1351329493530; Sat, 27 Oct 2012 02:18:13 -0700 (PDT) Received: from localhost ([122.167.99.215]) by mx.google.com with ESMTPS id c8sm2437992pav.4.2012.10.27.02.18.11 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 27 Oct 2012 02:18:13 -0700 (PDT) From: Viresh Kumar To: linus.walleij@linaro.org Subject: [PATCH 2/9] pinctrl: SPEAr3xx: correct register space to configure pwm Date: Sat, 27 Oct 2012 14:47:47 +0530 Message-Id: X-Mailer: git-send-email 1.7.12.rc2.18.g61b472e In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlvc4DXGjKCapgcKXJX4Ol/m6cfPuQjlEjNeOZjzJzk7hC4SSMj1FupNFJijCeF043xH87z X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shiraz Hashim , spear-devel@list.st.com, linux-arm-kernel@lists.infradead.org, Viresh Kumar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Shiraz Hashim To have pwm on pad no. 34 we also need to select between pwm and SD_LED functions. Add this to pwm pin mux register configuration. Signed-off-by: Shiraz Hashim Signed-off-by: Viresh Kumar Reviewed-by: Vipin Kumar --- drivers/pinctrl/spear/pinctrl-spear320.c | 4 ++++ drivers/pinctrl/spear/pinctrl-spear3xx.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 020b1e0..4fccf95 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c @@ -2240,6 +2240,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = { .mask = PMX_SSP_CS_MASK, .val = 0, }, { + .reg = MODE_CONFIG_REG, + .mask = PMX_PWM_MASK, + .val = PMX_PWM_MASK, + }, { .reg = IP_SEL_PAD_30_39_REG, .mask = PMX_PL_34_MASK, .val = PMX_PWM2_PL_34_VAL, diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h index 31f4434..7860b36 100644 --- a/drivers/pinctrl/spear/pinctrl-spear3xx.h +++ b/drivers/pinctrl/spear/pinctrl-spear3xx.h @@ -15,6 +15,7 @@ #include "pinctrl-spear.h" /* pad mux declarations */ +#define PMX_PWM_MASK (1 << 16) #define PMX_FIRDA_MASK (1 << 14) #define PMX_I2C_MASK (1 << 13) #define PMX_SSP_CS_MASK (1 << 12)