diff mbox series

[10/12] dmaengine: bcm2835: Support DMA-Lite channels

Message ID ca956587595954525fca0b635a66ca78b7000bf4.1706948717.git.andrea.porta@suse.com (mailing list archive)
State New, archived
Headers show
Series Add support for BCM2712 DMA engine | expand

Commit Message

Andrea della Porta Feb. 4, 2024, 6:59 a.m. UTC 
From: Maxime Ripard <maxime@cerno.tech>

The BCM2712 has a DMA-Lite controller that is basically a BCM2835-style
DMA controller that supports 40 bits DMA addresses.

We need it for HDMI audio to work.

Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
---
 drivers/dma/bcm2835-dma.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

Comments

Vinod Koul Feb. 7, 2024, 8:26 a.m. UTC | #1 
On 04-02-24, 07:59, Andrea della Porta wrote:
> From: Maxime Ripard <maxime@cerno.tech>
> 
> The BCM2712 has a DMA-Lite controller that is basically a BCM2835-style
> DMA controller that supports 40 bits DMA addresses.
> 
> We need it for HDMI audio to work.
> 
> Cc: Maxime Ripard <maxime@cerno.tech>
> Cc: Dom Cobley <popcornmix@gmail.com>
> Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> ---
>  drivers/dma/bcm2835-dma.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
> index 548cf7343d83..055c558caa0e 100644
> --- a/drivers/dma/bcm2835-dma.c
> +++ b/drivers/dma/bcm2835-dma.c
> @@ -100,6 +100,7 @@ struct bcm2835_chan {
>  
>  	bool is_lite_channel;
>  	bool is_40bit_channel;
> +	bool is_2712;

why not use is_40bit_channel..? also this can be applicable for more
soc, make it generic flag if you cant reuse this one

>  };
>  
>  struct bcm2835_desc {
> @@ -545,7 +546,11 @@ static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
>  			control_block->info = info;
>  			control_block->src = src;
>  			control_block->dst = dst;
> -			control_block->stride = 0;
> +			if (c->is_2712)
> +				control_block->stride = (upper_32_bits(dst) << 8) |
> +							upper_32_bits(src);
> +			else
> +				control_block->stride = 0;
>  			control_block->next = 0;
>  		}
>  
> @@ -570,7 +575,8 @@ static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
>  			 d->cb_list[frame - 1].cb)->next_cb =
>  				to_bcm2711_cbaddr(cb_entry->paddr);
>  		if (frame && !c->is_40bit_channel)
> -			d->cb_list[frame - 1].cb->next = cb_entry->paddr;
> +			d->cb_list[frame - 1].cb->next = c->is_2712 ?
> +			to_bcm2711_cbaddr(cb_entry->paddr) : cb_entry->paddr;
>  
>  		/* update src and dst and length */
>  		if (src && (info & BCM2835_DMA_S_INC)) {
> @@ -750,7 +756,10 @@ static void bcm2835_dma_start_desc(struct bcm2835_chan *c)
>  		writel(BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT | BCM2711_DMA40_CS_FLAGS(c->dreq),
>  		       c->chan_base + BCM2711_DMA40_CS);
>  	} else {
> -		writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
> +		writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
> +
> +		writel(c->is_2712 ? to_bcm2711_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr,
> +		       c->chan_base + BCM2835_DMA_ADDR);
>  		writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
>  		       c->chan_base + BCM2835_DMA_CS);
>  	}
> @@ -1119,7 +1128,8 @@ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
>  		 d->cb_list[frames - 1].cb)->next_cb =
>  			to_bcm2711_cbaddr(d->cb_list[0].paddr);
>  	else
> -		d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr;
> +		d->cb_list[d->frames - 1].cb->next = c->is_2712 ?
> +		to_bcm2711_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr;
>  
>  	return vchan_tx_prep(&c->vc, &d->vd, flags);
>  }
> @@ -1186,6 +1196,8 @@ static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id,
>  	else if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
>  		 BCM2835_DMA_DEBUG_LITE)
>  		c->is_lite_channel = true;
> +	if (d->cfg_data->dma_mask == DMA_BIT_MASK(40))
> +		c->is_2712 = true;
>  
>  	return 0;
>  }
> -- 
> 2.41.0
diff mbox series

Patch

diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
index 548cf7343d83..055c558caa0e 100644
--- a/drivers/dma/bcm2835-dma.c
+++ b/drivers/dma/bcm2835-dma.c
@@ -100,6 +100,7 @@  struct bcm2835_chan {
 
 	bool is_lite_channel;
 	bool is_40bit_channel;
+	bool is_2712;
 };
 
 struct bcm2835_desc {
@@ -545,7 +546,11 @@  static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
 			control_block->info = info;
 			control_block->src = src;
 			control_block->dst = dst;
-			control_block->stride = 0;
+			if (c->is_2712)
+				control_block->stride = (upper_32_bits(dst) << 8) |
+							upper_32_bits(src);
+			else
+				control_block->stride = 0;
 			control_block->next = 0;
 		}
 
@@ -570,7 +575,8 @@  static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
 			 d->cb_list[frame - 1].cb)->next_cb =
 				to_bcm2711_cbaddr(cb_entry->paddr);
 		if (frame && !c->is_40bit_channel)
-			d->cb_list[frame - 1].cb->next = cb_entry->paddr;
+			d->cb_list[frame - 1].cb->next = c->is_2712 ?
+			to_bcm2711_cbaddr(cb_entry->paddr) : cb_entry->paddr;
 
 		/* update src and dst and length */
 		if (src && (info & BCM2835_DMA_S_INC)) {
@@ -750,7 +756,10 @@  static void bcm2835_dma_start_desc(struct bcm2835_chan *c)
 		writel(BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT | BCM2711_DMA40_CS_FLAGS(c->dreq),
 		       c->chan_base + BCM2711_DMA40_CS);
 	} else {
-		writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
+		writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
+
+		writel(c->is_2712 ? to_bcm2711_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr,
+		       c->chan_base + BCM2835_DMA_ADDR);
 		writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
 		       c->chan_base + BCM2835_DMA_CS);
 	}
@@ -1119,7 +1128,8 @@  static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
 		 d->cb_list[frames - 1].cb)->next_cb =
 			to_bcm2711_cbaddr(d->cb_list[0].paddr);
 	else
-		d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr;
+		d->cb_list[d->frames - 1].cb->next = c->is_2712 ?
+		to_bcm2711_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr;
 
 	return vchan_tx_prep(&c->vc, &d->vd, flags);
 }
@@ -1186,6 +1196,8 @@  static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id,
 	else if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
 		 BCM2835_DMA_DEBUG_LITE)
 		c->is_lite_channel = true;
+	if (d->cfg_data->dma_mask == DMA_BIT_MASK(40))
+		c->is_2712 = true;
 
 	return 0;
 }