[v2] ARM: OMAP2+: l2c: squelch warning dump on power control setting

Commit Message

Sekhar Nori July 14, 2014, 1:13 p.m. UTC

On OMAP SOCs using PL310 controllers, power_ctrl register is not
accessible from non-secure software even on PL310 versions which
support it. The secure code takes care of setting it up correctly
and power transitions are proven on these devices.

For example, AM437x has L2C-310 version r3p3 and ROM code on that
device does not support writing to L2C-310 power control register.
The L2C driver, however, tries writing to this register for all
revisions >= r3p0.

This leads to a warning dump on boot which leads most users to believe
that L2 cache is non-functional.

Since the problem is understood, and cannot be addressed through
software, replace the warning with a pr_info() while maintaining the
WARN_ON() for other truly unexpected scenarios.

Reported-by: Nishanth Menon <[e-mail]>
Tested-by: Felipe Balbi <[e-mail]>
Signed-off-by: Sekhar Nori <[e-mail]>
---
Only description updated since v1

 arch/arm/mach-omap2/omap4-common.c |    4 ++++
 1 file changed, 4 insertions(+)

Comments

Santosh Shilimkar July 14, 2014, 2:31 p.m. UTC | #1

On Monday 14 July 2014 09:13 AM, Sekhar Nori wrote:
> On OMAP SOCs using PL310 controllers, power_ctrl register is not
> accessible from non-secure software even on PL310 versions which
> support it. The secure code takes care of setting it up correctly
> and power transitions are proven on these devices.
> 
> For example, AM437x has L2C-310 version r3p3 and ROM code on that
> device does not support writing to L2C-310 power control register.
> The L2C driver, however, tries writing to this register for all
> revisions >= r3p0.
> 
> This leads to a warning dump on boot which leads most users to believe
> that L2 cache is non-functional.
> 
> Since the problem is understood, and cannot be addressed through
> software, replace the warning with a pr_info() while maintaining the
> WARN_ON() for other truly unexpected scenarios.
> 
> Reported-by: Nishanth Menon <[e-mail]>
> Tested-by: Felipe Balbi <[e-mail]>
> Signed-off-by: Sekhar Nori <[e-mail]>
> ---
> Only description updated since v1
> 
Thanks for update.
Acked-by: Santosh Shilimkar <[e-mail]>

Tony Lindgren July 14, 2014, 4:25 p.m. UTC | #2

* Santosh Shilimkar <[e-mail]> [140714 07:33]:
> On Monday 14 July 2014 09:13 AM, Sekhar Nori wrote:
> > On OMAP SOCs using PL310 controllers, power_ctrl register is not
> > accessible from non-secure software even on PL310 versions which
> > support it. The secure code takes care of setting it up correctly
> > and power transitions are proven on these devices.
> > 
> > For example, AM437x has L2C-310 version r3p3 and ROM code on that
> > device does not support writing to L2C-310 power control register.
> > The L2C driver, however, tries writing to this register for all
> > revisions >= r3p0.
> > 
> > This leads to a warning dump on boot which leads most users to believe
> > that L2 cache is non-functional.
> > 
> > Since the problem is understood, and cannot be addressed through
> > software, replace the warning with a pr_info() while maintaining the
> > WARN_ON() for other truly unexpected scenarios.
> > 
> > Reported-by: Nishanth Menon <[e-mail]>
> > Tested-by: Felipe Balbi <[e-mail]>
> > Signed-off-by: Sekhar Nori <[e-mail]>
> > ---
> > Only description updated since v1
> > 
> Thanks for update.
> Acked-by: Santosh Shilimkar <[e-mail]>
> 

Thanks applying into omap-for-v3.16/fixes.

Tony

Patch

diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 326cd98..9139729 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -188,6 +188,10 @@  static void omap4_l2c310_write_sec(unsigned long val, unsigned reg)
 		smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX;
 		break;
 
+	case L310_POWER_CTRL:
+		pr_info_once("OMAP L2C310: ROM does not support power control setting\n");
+		return;
+
 	default:
 		WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg);
 		return;