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Wed, 25 Jul 2018 09:43:41 -0700 (PDT) From: Sergei Shtylyov Subject: [PATCH] arm64: dts: renesas: r8a77980: add Cortex-A53 PMU support To: Simon Horman , linux-renesas-soc@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Catalin Marinas , Will Deacon References: <2368353.xfo5beGC5E@wasted.cogentembedded.com> Organization: Cogent Embedded Message-ID: Date: Wed, 25 Jul 2018 19:43:41 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <2368353.xfo5beGC5E@wasted.cogentembedded.com> Content-Language: en-MW X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180725_094355_217470_EDD3000C X-CRM114-Status: GOOD ( 15.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Magnus Damm , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Describe the performance monitor unit (PMU) for the Cortex-A53 cores in the R8A77970 SoC's device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- The patch is against the 'renesas-devel-20180724-v4.18-rc6' tag of Simon Horman's 'renesas.git' repo. arch/arm64/boot/dts/renesas/r8a77980.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -98,6 +98,15 @@ clock-frequency = <0>; }; + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; + }; + psci { compatible = "arm,psci-1.0", "arm,psci-0.2"; method = "smc";