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Fri, 25 Oct 2024 16:50:50 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , Subject: [PATCH v5 03/13] iommu/viommu: Add cache_invalidate to iommufd_viommu_ops Date: Fri, 25 Oct 2024 16:50:32 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075EE:EE_|PH7PR12MB6980:EE_ X-MS-Office365-Filtering-Correlation-Id: 2f9af7a3-dbd6-4107-3bc2-08dcf54fe0aa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|7416014|1800799024; X-Microsoft-Antispam-Message-Info: t0wqGYWZmbAXttT5DXVjhCiWBx1q+TNk2gvgk/lni8XdjDXEUZuc8gRoviC0K18d25FZe2+8pNRiuF8D2KbKMNX3D7ZD2sw3/hF6j3J9aoZHlNg1snFEcStjFa8jq6hIvvpjxLUVyB8F8pZRfzWOW3lV1mNjE0mGy7S7g8Lk/rMW6NbbqBtjjFFpqvMISbiM3zqP8ydzt4VtfwirbHG5anx7N/Qs1TnlsyfIIrEF1gn0AxFK7gsKj6oU2fAkDsJpLVbtSoVeV8SYfaHgQ0Oa6xTmrzDRY22bFwzPhkDad89iLxnYgeg0S1UMn0XEjdn6Bo7yJSFoLGv8YFqqsWZwFB/Zny7bfzTDoIxPd/w37lhLuU78iVR6cthRPZdYiRWplNYfy5v+kVYTCymO4BCDfXiWQaQTGf3E+Cwd63i8Av4RICmfS9ueWgUeUEbcU1frLz0t898w2CtDgEp02BBjF1n7nOAteAi8iGkQPOIjJWeaL5Dun4YXvSGlz5iAzvbESr5G8EMF57ne28cdn3cQX2azJwgxrq2GjzQ6Xyypi/Trx19I85vfoV9b2ehPWR/DO+yLPjpxrzc0lq08TZ9DEFVDmyR5ZXJ8TRpSm8oSG7YT+q4FKx/kTGTR1/50YO0P1cKQmSvo7sxAHXDrmzThgW2uHxFvRWOg9qD/xGFzL1ns7HV2cMz4TQql6/eAnFuvQea5HqaoVseFfWS+m9vFI/DuPvT9DV6roWSdGGJBrVQGM7WdZT43VDYOUPQP/621cuHRDwrrHaYBRf3CzfkWZ1CMzl3toj2lh9ZWy+H+euIj5XLEkW2MPv+ESKyF2id/Vu91r6pFq21yMktapJX56+mP9Nadq4o6TT22iwx+qwMtgkpAsdrlMAdUXOiU2T5uVrcF7k2gnLcS7K9jXYCrGHtWkf+jJSlZQKq65jlwTjLmkCHlXSCP+G3zo95Rn7hGf/ROLDe4C/FGUHamXTJNpnEttlC+F8mUUdmrHZJTsVTdXyDLwSbMOzfPLRmHWXSpDgBMcGPR4nOfGxzRDBbkdJfDK12L/5uCBYoPzIj4WGaD4lsKBhfmsuR7wzSJ257FNJl4oMjhm0dHjjN7Fgct9lZbPXw79VtF8p6WKvxp+jarhGzxDR2xbDjH9QtwUBzRQU7XEc4JIX/TFD7ZIrU0OcPUNI/ebw9Au/6IFQLBHLW9Ig4ZNLt7ULUVgJy2Jcb1YL6MRpQvJmfeLtpAPBz44zhHWmkU8hm05x8Sucu78LWPJUzkqmnvffjonR+SPp2pJC410uaJpJZonHnD3f4fvlvtFPOjkQspiRCEwVhxNmsMLpGIQFDf9CEA/z1DYPrW+Jw9Rv/SRZkUfi2gx80xOqdlsVGJBN+ZcnAOIAB8fZMzXAE8Ho8pJ04dlK6suYeBOhYfGVOzeygFamH+9e8d7A== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(7416014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 23:50:59.9460 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2f9af7a3-dbd6-4107-3bc2-08dcf54fe0aa X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075EE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6980 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241025_165109_832659_E2490AC1 X-CRM114-Status: GOOD ( 11.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This per-vIOMMU cache_invalidate op is like the cache_invalidate_user op in struct iommu_domain_ops, but wider, supporting device cache (e.g. PCI ATC invaldiations). Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- include/linux/iommufd.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index e6cd288e8b83..0287a6d00192 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -15,6 +15,7 @@ struct device; struct file; struct iommu_group; struct iommu_user_data; +struct iommu_user_data_array; struct iommufd_access; struct iommufd_ctx; struct iommufd_device; @@ -104,12 +105,21 @@ struct iommufd_viommu { * must be defined in include/uapi/linux/iommufd.h. * It must fully initialize the new iommu_domain before * returning. Upon failure, ERR_PTR must be returned. + * @cache_invalidate: Flush hardware cache used by a vIOMMU. It can be used for + * any IOMMU hardware specific cache: TLB and device cache. + * The @array passes in the cache invalidation requests, in + * form of a driver data structure. A driver must update the + * array->entry_num to report the number of handled requests. + * The data structure of the array entry must be defined in + * include/uapi/linux/iommufd.h */ struct iommufd_viommu_ops { void (*free)(struct iommufd_viommu *viommu); struct iommu_domain *(*alloc_domain_nested)( struct iommufd_viommu *viommu, const struct iommu_user_data *user_data); + int (*cache_invalidate)(struct iommufd_viommu *viommu, + struct iommu_user_data_array *array); }; #if IS_ENABLED(CONFIG_IOMMUFD)