From patchwork Wed Mar 30 16:50:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Francois Moine X-Patchwork-Id: 8701911 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 54DE9C0553 for ; Wed, 30 Mar 2016 17:46:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 781BD20389 for ; Wed, 30 Mar 2016 17:46:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9CC782038D for ; Wed, 30 Mar 2016 17:46:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1alKAb-0004fN-FJ; Wed, 30 Mar 2016 17:44:41 +0000 Received: from smtp5-g21.free.fr ([212.27.42.5]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1alKA6-0004BB-Vw for linux-arm-kernel@lists.infradead.org; Wed, 30 Mar 2016 17:44:13 +0000 Received: from localhost (unknown [IPv6:2a01:e35:2f5c:9de0:6b55:87da:4920:b782]) by smtp5-g21.free.fr (Postfix) with ESMTP id BC776D48143; Wed, 30 Mar 2016 19:38:56 +0200 (CEST) X-Mailbox-Line: From e63499f789971b8c45a0ae5e90bd127371cbcf19 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Jean-Francois Moine Date: Wed, 30 Mar 2016 18:50:43 +0200 Subject: [PATCH 2/3] clk: sunxi: Add sun6i/8i PLL video support To: Emilio Lopez , Maxime Ripard , Chen-Yu Tsai X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160330_104411_468224_9B96E131 X-CRM114-Status: GOOD ( 10.69 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the PLL type which is used by the sun6i/8i families for video display. Signed-off-by: Jean-Francois Moine Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c | 65 +++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt index 8c0fda8..ff93aee 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -10,6 +10,7 @@ Required properties: "allwinner,sun4i-a10-pll1-clk" - for the main PLL clock and PLL4 "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31 "allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23 + "allwinner,sun6i-a31-pll3-clk" - for the video PLL clock "allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80 "allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock "allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 0581e1b..270f2a9 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "clk-factors.h" @@ -1129,6 +1130,70 @@ CLK_OF_DECLARE(sun6i_pll6, "allwinner,sun6i-a31-pll6-clk", sun6i_pll6_clk_setup); /* + * sun6i pll3 + * + * if (p == 0) rate = k ? 270MHz : 297MHz + * else rate = parent_rate / (m + 1) * (n + 1); + */ +static void sun6i_pll3_factors(struct factors_request *req) +{ + unsigned long n, m; + + if (req->rate == 270000000) { + req->m = 0; + req->p = 0; + req->k = 0; + } else if (req->rate == 297000000) { + req->m = 0; + req->p = 0; + req->k = 1; + } else { + rational_best_approximation(req->rate, + req->parent_rate, + 1 << 7, 1 << 4, &n, &m); + req->rate = req->parent_rate / m * n; + req->p = 1; + req->m = m - 1; + req->n = n - 1; + } +} + +static void sun6i_pll3_recalc(struct factors_request *req) +{ + if (req->p) + req->rate = req->parent_rate / (req->m + 1) * (req->n + 1); + else if (req->k) + req->rate = 270000000; + else + req->rate = 297000000; +} + +static const struct clk_factors_config sun6i_pll3_config = { + .mshift = 0, + .mwidth = 4, + .nshift = 8, + .nwidth = 7, + .pshift = 24, /* mode selection fractional / integer */ + .pwidth = 1, + .kshift = 25, /* fraction 270 / 297 MHz */ + .kwidth = 1, +}; + +static const struct factors_data sun6i_pll3_data __initconst = { + .enable = 31, + .table = &sun6i_pll3_config, + .getter = sun6i_pll3_factors, + .recalc = sun6i_pll3_recalc, +}; + +static void __init sun6i_pll3_setup(struct device_node *node) +{ + sunxi_factors_clk_setup(node, &sun6i_pll3_data); +} +CLK_OF_DECLARE(sun6i_pll3, "allwinner,sun6i-a31-pll3-clk", + sun6i_pll3_setup); + +/* * sun6i display * * rate = parent_rate / (m + 1);