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h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Wi0WGhkeV1RzlVqOJY4HaXI1Zlham8MFTpuZ/KUi9PA=; b=J0gewWExy9JibTWWwmI6SyubeAwxAs0TKAkswnvd4QtRenemRA7aZoLG1qsvep8XWH LcrrcOccdpBybBenOGEy0T51CziQll+PRzGdxL17f1+5tjYFGjRSCJXb4iyj+8ZJQQAi P2/wGUCu7l843AfIf+mM6IZ2DyDpBM3K1y98U52PR6cdhvmsB+uDva/sFQ8fvPTJU3dw pzkuFCvCN4w2zX/590zJOCTEMNEAm3rQJqgg3VWncaIX1JqOlRu+ACf1EBqHuvXqlY90 tjX6tCrLMFzWpcRd2kH4oM+2pjGSEW7GoqFvBxf8Bk/UZw5jgrckyyFzbPq6DXEv+7Nd DCpg== X-Gm-Message-State: AGRZ1gL80ejG1HFpzSTYHkTn6p5CJdzZjckn7WKE36/aB2+OICfaBuUA D3zaKdwVQxKxgz+5CEjrUxQ= X-Google-Smtp-Source: AJdET5e0DVbiKoIunvuj/eYPNez3GFEYebViPktkHFizirnUO5BsrbG0T9v8MrIMgLZCu0qaYiyAvg== X-Received: by 2002:a1c:e046:: with SMTP id x67mr19006106wmg.122.1543131852005; Sat, 24 Nov 2018 23:44:12 -0800 (PST) Received: from localhost.localdomain ([185.219.177.224]) by smtp.gmail.com with ESMTPSA id 6-v6sm12296780wmg.19.2018.11.24.23.44.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 24 Nov 2018 23:44:11 -0800 (PST) From: Mesih Kilinc To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [RFC PATCH v4 14/17] dt-bindings: sram: Add Allwinner suniv F1C100s Date: Sun, 25 Nov 2018 10:43:17 +0300 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181124_234424_009792_D63B610A X-CRM114-Status: GOOD ( 11.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mesih Kilinc , Julian Calaby , Linus Walleij , Daniel Lezcano , Russell King , Marc Zyngier , Chen-Yu Tsai , Rob Herring , Maxime Ripard , Icenowy Zheng MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The suniv ARMv5 F1C100s chip has similar sram controller to sun4i A10. Add compatible string for it. Signed-off-by: Mesih Kilinc Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/sram/sunxi-sram.txt b/Documentation/devicetree/bindings/sram/sunxi-sram.txt index 62dd074..5c84850 100644 --- a/Documentation/devicetree/bindings/sram/sunxi-sram.txt +++ b/Documentation/devicetree/bindings/sram/sunxi-sram.txt @@ -19,6 +19,7 @@ Required properties: - "allwinner,sun50i-a64-sram-controller" (deprecated) - "allwinner,sun50i-a64-system-control" - "allwinner,sun50i-h6-system-control", "allwinner,sun50i-a64-system-control" + - "allwinner,suniv-f1c100s-system-control", "allwinner,sun4i-a10-system-control" - reg : sram controller register offset + length SRAM nodes @@ -58,6 +59,9 @@ The valid sections compatible for A64 are: The valid sections compatible for H6 are: - allwinner,sun50i-h6-sram-c, allwinner,sun50i-a64-sram-c +The valid sections compatible for F1C100s are: + - allwinner,suniv-f1c100s-sram-d, allwinner,sun4i-a10-sram-d + Devices using SRAM sections ---------------------------