From patchwork Tue Sep 16 10:37:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Krzysztof_Ha=C5=82asa?= X-Patchwork-Id: 4916071 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5C883BEEA5 for ; Tue, 16 Sep 2014 10:39:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D4CB4201CE for ; Tue, 16 Sep 2014 10:39:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA244201BF for ; Tue, 16 Sep 2014 10:39:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XTq8i-0007px-FH; Tue, 16 Sep 2014 10:37:40 +0000 Received: from ni.piap.pl ([195.187.100.4]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XTq8f-0007g6-Ex for linux-arm-kernel@lists.infradead.org; Tue, 16 Sep 2014 10:37:37 +0000 Received: from ni.piap.pl (localhost.localdomain [127.0.0.1]) by ni.piap.pl (Postfix) with ESMTP id AAA9B441D80; Tue, 16 Sep 2014 12:37:16 +0200 (CEST) Received: by ni.piap.pl (Postfix, from userid 1015) id A4C6D441D81; Tue, 16 Sep 2014 12:37:16 +0200 (CEST) From: khalasa@piap.pl (Krzysztof =?utf-8?Q?Ha=C5=82asa?=) To: linux-arm-kernel@lists.infradead.org References: Date: Tue, 16 Sep 2014 12:37:16 +0200 In-Reply-To: ("Krzysztof =?utf-8?Q?Ha=C5=82as?= =?utf-8?Q?a=22's?= message of "Tue, 16 Sep 2014 12:31:46 +0200") MIME-Version: 1.0 Message-ID: Subject: [PATCH 3/3] CNS3xxx: Fix PCIe read size limit. X-Anti-Virus: Kaspersky Anti-Virus for Linux Mail Server 5.6.44/RELEASE, bases: 20140401 #7726142, check: 20140916 clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140916_033737_697133_68738292 X-CRM114-Status: UNSURE ( 7.33 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) Cc: arm@kernel.org, Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Max_Read_Request_Size is 3 bits wide, not 2 bits. Also fix the message. Signed-off-by: Krzysztof Ha?asa diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 4ddb974..85e2135 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c @@ -299,12 +299,15 @@ static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci) devfn = PCI_DEVFN(0, 0); pos = pci_bus_find_capability(&bus, devfn, PCI_CAP_ID_EXP); pci_bus_read_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, &dc); - dc &= ~(0x3 << 12); /* Clear Device Control Register [14:12] */ - pci_bus_write_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, dc); - pci_bus_read_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, &dc); - if (!(dc & (0x3 << 12))) - pr_info("PCIe: Set Device Max_Read_Request_Size to 128 byte\n"); - + if (dc & PCI_EXP_DEVCTL_READRQ) { + dc &= ~PCI_EXP_DEVCTL_READRQ; + pci_bus_write_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, dc); + pci_bus_read_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, &dc); + if (dc & PCI_EXP_DEVCTL_READRQ) + pr_warn("PCIe: Unable to set device Max_Read_Request_Size\n"); + else + pr_info("PCIe: Max_Read_Request_Size set to 128 bytes\n"); + } /* Disable PCIe0 Interrupt Mask INTA to INTD */ __raw_writel(~0x3FFF, MISC_PCIE_INT_MASK(port)); }