From patchwork Mon Feb 4 16:15:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10796031 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3172813B5 for ; Mon, 4 Feb 2019 16:15:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 182AC2B3B1 for ; Mon, 4 Feb 2019 16:15:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0AFBE2B4B3; Mon, 4 Feb 2019 16:15:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94D5E2ADB8 for ; Mon, 4 Feb 2019 16:15:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731692AbfBDQPx (ORCPT ); Mon, 4 Feb 2019 11:15:53 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:49512 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726979AbfBDQPx (ORCPT ); Mon, 4 Feb 2019 11:15:53 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 18F016090B; Mon, 4 Feb 2019 16:15:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1549296952; bh=i/9xs5tXwe1lwQwwJZyf349mfbz+v3WCI2sDqzwHLoo=; h=From:To:Cc:Subject:Date:From; b=HVn2vCzVHnzCdgPWhNcJdzv7Nt0fBZzVdqnfoKDHfCxj908laRJvE3tFgwNV8wFbh zraYwe80JDFP5OaIBqi9W953/UKe5qgS50xwn7om4c4VVjWpCf0rsUtGbmgqMvljQM yTI7vKjOsni0ECrbj3X6UZn7wvvh2290d1/wd7/c= Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 09B0960134; Mon, 4 Feb 2019 16:15:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1549296950; bh=i/9xs5tXwe1lwQwwJZyf349mfbz+v3WCI2sDqzwHLoo=; h=From:To:Cc:Subject:Date:From; b=cUGvOTrJkasM7nqHk8FEaVzOFR3rs9u8uXugcESSDxKpjB8t1HmiW/tbVUp5TLzP1 HRFYcbSJks4LDu5XfRamMsOAdp6bjvwAheokkJSiiGg6fcVL74zanJZMUhGSsjm3oH 3Gyx7MsdIuBCsC7cNoBNNEUT40pr6fi+pgOiJEyQ= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 09B0960134 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, Arnd Bergmann , Thomas Zimmermann , Sharat Masetty , dri-devel@lists.freedesktop.org, Rob Herring , David Airlie , Douglas Anderson , Rob Clark , Colin Ian King , devicetree@vger.kernel.org, Stephen Boyd , Andy Gross , Daniel Mack , linux-kernel@vger.kernel.org, Mamta Shukla , Jonathan Marek , Mark Rutland , Sean Paul , Daniel Vetter Subject: [PATCH v1 0/6] drm/msm: Improved a6xx GMU reset Date: Mon, 4 Feb 2019 09:15:38 -0700 Message-Id: <1549296944-17285-1-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is a stack of changes for 5.1 (if I'm not already too late). The bulk of the changes implement a better GMU reset sequence using the new gpucc power domain added in 5.0. If a GMU fault occurs during runtime we try to do a standard GPU recovery and if the fault happens during GMU start then try to fail somewhat gracefully than BUG_ON. There will be a DT change to go along with this, but we can send that along after the core code is merged. The downside for not having the domain properly listed is that the runtime reset sequence probably won't work which is no worse than it is today. Jordan Crouse (6): drm/msm/a6xx: Remove unwanted regulator code dt-bindings: drm/msm/a6xx: Add GX power-domain for GMU bindings drm/msm/gpu: Attach to the GPU GX power domain drm/msm/a6xx: Make GMU reset useful msm/drm/a6xx: Turn off the GMU if resume fails drm/msm/a6xx: Remove an unused struct member .../devicetree/bindings/display/msm/gmu.txt | 10 +- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 200 +++++++++++++-------- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 9 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 20 +-- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 +- drivers/gpu/drm/msm/adreno/adreno_device.c | 1 + 6 files changed, 144 insertions(+), 99 deletions(-)