From patchwork Thu Feb 27 09:55:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 11408187 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B3C4414BC for ; Thu, 27 Feb 2020 09:55:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9DA3F24680 for ; Thu, 27 Feb 2020 09:55:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728731AbgB0Jz3 (ORCPT ); Thu, 27 Feb 2020 04:55:29 -0500 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:38118 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728713AbgB0Jz3 (ORCPT ); Thu, 27 Feb 2020 04:55:29 -0500 Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-01.qualcomm.com with ESMTP; 27 Feb 2020 01:55:28 -0800 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg03-sd.qualcomm.com with ESMTP; 27 Feb 2020 01:55:24 -0800 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id 86954214E2; Thu, 27 Feb 2020 15:25:22 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: sivaprak@codeaurora.org Subject: [PATCH 0/2] Add APSS clock controller support for IPQ6018 Date: Thu, 27 Feb 2020 15:25:16 +0530 Message-Id: <1582797318-26288-1-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The APSS clock controller in ipq6018 based devices supports cpu with frequencies above 800Mhz. This patch series adds the support for the same. Sivaprakash Murugesan (2): clk: qcom: Add DT bindings for ipq6018 apss clock controller clk: qcom: Add ipq6018 apss clock controller .../devicetree/bindings/clock/qcom,apsscc.yaml | 58 ++++++ drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/apss-ipq6018.c | 210 +++++++++++++++++++++ include/dt-bindings/clock/qcom,apss-ipq6018.h | 26 +++ 5 files changed, 303 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,apsscc.yaml create mode 100644 drivers/clk/qcom/apss-ipq6018.c create mode 100644 include/dt-bindings/clock/qcom,apss-ipq6018.h