mbox series

[v6,0/5] Add SS/HS-USB changes for Qualcomm SM8150 chipset

Message ID 1586472749-18599-1-git-send-email-wcheng@codeaurora.org (mailing list archive)
Headers show
Series Add SS/HS-USB changes for Qualcomm SM8150 chipset | expand

Message

Wesley Cheng April 9, 2020, 10:52 p.m. UTC
This series adds support for the Synopsis 7nm HSPHY USB driver being
used in QCOM chipsets.  The HSPHY register map differs compared to 
other PHY revisions.  In addition, modifications and updates are done
to the QMP driver to add new registers/offsets, and to update the
initialization sequence for enabling the SSUSB path on SM8150.

Changes in v6:
 - Addressed coding style errors in phy-qcom-snps-femto-v2.c

Changes in v5:
 - Reorganize IF check for when to use the proper PWRDOWN CTRL offset
 - Rename UFS specific offset definitions in the QMP PHY driver to clearly
   denote they are UFS specific
 - Rename the phy-qcom-snps-7nm driver to phy-qcom-snps-femto-v2

Changes in v4:
 - Fix POWERDOWN offset for QMP PHY exit routine, and check for
   has_phy_dp_com_ctrl instead of !has_phy_com_ctrl

Changes in v3:
 - Use devm_reset_control_get_exclusive instead of referencing index for
   reset handle

Changes in v2:
 - Fixed YAML errors caught by dt_binding_check

Jack Pham (1):
  phy: qcom-qmp: Add SM8150 QMP USB3 PHY support

Wesley Cheng (4):
  dt-bindings: phy: Add binding for qcom,usb-snps-femto-v2
  phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs
  phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB
  phy: qcom-qmp: Rename UFS PCS QMP v4 registers

 .../bindings/phy/qcom,usb-snps-femto-v2.yaml       |  77 ++++++
 drivers/phy/qualcomm/Kconfig                       |  10 +
 drivers/phy/qualcomm/Makefile                      |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp.c                | 193 +++++++++++++-
 drivers/phy/qualcomm/phy-qcom-qmp.h                | 238 +++++++++++++++--
 drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c      | 296 +++++++++++++++++++++
 6 files changed, 779 insertions(+), 36 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
 create mode 100644 drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

Comments

Wesley Cheng April 28, 2020, 5:05 p.m. UTC | #1
Hi Kishon/Vinod,

Is this series good, and can be picked up?  Noticed that there was
another recent change to the QMP PHY driver as well:
https://patchwork.kernel.org/cover/11514761/

Did you want me to rebase my changes on top of that, or the current
changes are sufficient?

Thanks
Wesley

On 4/9/2020 3:52 PM, Wesley Cheng wrote:
> This series adds support for the Synopsis 7nm HSPHY USB driver being
> used in QCOM chipsets.  The HSPHY register map differs compared to 
> other PHY revisions.  In addition, modifications and updates are done
> to the QMP driver to add new registers/offsets, and to update the
> initialization sequence for enabling the SSUSB path on SM8150.
> 
> Changes in v6:
>  - Addressed coding style errors in phy-qcom-snps-femto-v2.c
> 
> Changes in v5:
>  - Reorganize IF check for when to use the proper PWRDOWN CTRL offset
>  - Rename UFS specific offset definitions in the QMP PHY driver to clearly
>    denote they are UFS specific
>  - Rename the phy-qcom-snps-7nm driver to phy-qcom-snps-femto-v2
> 
> Changes in v4:
>  - Fix POWERDOWN offset for QMP PHY exit routine, and check for
>    has_phy_dp_com_ctrl instead of !has_phy_com_ctrl
> 
> Changes in v3:
>  - Use devm_reset_control_get_exclusive instead of referencing index for
>    reset handle
> 
> Changes in v2:
>  - Fixed YAML errors caught by dt_binding_check
> 
> Jack Pham (1):
>   phy: qcom-qmp: Add SM8150 QMP USB3 PHY support
> 
> Wesley Cheng (4):
>   dt-bindings: phy: Add binding for qcom,usb-snps-femto-v2
>   phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs
>   phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB
>   phy: qcom-qmp: Rename UFS PCS QMP v4 registers
> 
>  .../bindings/phy/qcom,usb-snps-femto-v2.yaml       |  77 ++++++
>  drivers/phy/qualcomm/Kconfig                       |  10 +
>  drivers/phy/qualcomm/Makefile                      |   1 +
>  drivers/phy/qualcomm/phy-qcom-qmp.c                | 193 +++++++++++++-
>  drivers/phy/qualcomm/phy-qcom-qmp.h                | 238 +++++++++++++++--
>  drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c      | 296 +++++++++++++++++++++
>  6 files changed, 779 insertions(+), 36 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
>
Vinod Koul May 4, 2020, 7:15 a.m. UTC | #2
Hi Wesley,

On 09-04-20, 15:52, Wesley Cheng wrote:
> This series adds support for the Synopsis 7nm HSPHY USB driver being
> used in QCOM chipsets.  The HSPHY register map differs compared to 
> other PHY revisions.  In addition, modifications and updates are done
> to the QMP driver to add new registers/offsets, and to update the
> initialization sequence for enabling the SSUSB path on SM8150.

This fails to apply for me, Can you please rebase on
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git next and
send.

Also, I saw checkpatch --strict complain about "Alignment should match
open parenthesis" please check and fix while not sacrificing readablity.

Thanks
Wesley Cheng May 4, 2020, 7:51 a.m. UTC | #3
On 5/4/2020 12:15 AM, Vinod Koul wrote:
> Hi Wesley,
> 
> On 09-04-20, 15:52, Wesley Cheng wrote:
>> This series adds support for the Synopsis 7nm HSPHY USB driver being
>> used in QCOM chipsets.  The HSPHY register map differs compared to 
>> other PHY revisions.  In addition, modifications and updates are done
>> to the QMP driver to add new registers/offsets, and to update the
>> initialization sequence for enabling the SSUSB path on SM8150.
> 
> This fails to apply for me, Can you please rebase on
> git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git next and
> send.
> 
> Also, I saw checkpatch --strict complain about "Alignment should match
> open parenthesis" please check and fix while not sacrificing readablity.
> 
> Thanks
> 

Hi Vinod,

Got it!  Will rebase and fix warnings, and resend a patch revision
tomorrow.  Thanks again.