[0/6] Enable miscellaneous hardware blocks to boot WPSS

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Headers	show Return-Path: <linux-arm-msm-owner@kernel.org> Date: Subject: Cc: To: From: Sender; bh=GnXT3CMbghQtyRJZBgCfodavscSOdiLXWyQmtmjzkks=; b=Tko7x++ENGSpffCUEKycxx75XFPCx3eq7cDL/au1Z5ju0fm5OJMXUbuKCOVv4BorrGyoxFkM IdVLUIZitLr1gculZuyJINJmL1JJCv8aI4bPsao+FViFVMzlqiX/NP8wvpPMUBRIhMjBXSjm Hah2aZKFr13QS/9QLPfP7DQTQu8= Sender: sibis=codeaurora.org@mg.codeaurora.org sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 38D3FC433CA; Tue, 9 Mar 2021 05:52:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 38D3FC433CA From: Sibi Sankar <sibis@codeaurora.org> To: p.zabel@pengutronix.de, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: agross@kernel.org, mani@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sboyd@kernel.org, Sibi Sankar <sibis@codeaurora.org> Subject: [PATCH 0/6] Enable miscellaneous hardware blocks to boot WPSS Date: Tue, 9 Mar 2021 11:21:45 +0530 Message-Id: <1615269111-25559-1-git-send-email-sibis@codeaurora.org> Precedence: bulk
Series	Enable miscellaneous hardware blocks to boot WPSS \| expand [0/6] Enable miscellaneous hardware blocks to boot WPSS [1/6] soc: qcom: smem: Update max processor count [2/6] dt-bindings: mailbox: Add WPSS client index to IPCC [3/6] dt-bindings: reset: aoss: Add AOSS reset controller binding [4/6] dt-bindings: reset: pdc: Add PDC Global bindings [5/6] reset: qcom: Add PDC Global reset signals for WPSS [6/6] arm64: dts: qcom: sc7280: Add nodes to boot WPSS

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1615269111-25559-1-git-send-email-sibis@codeaurora.org (mailing list archive)

Headers

Sender: sibis=codeaurora.org@mg.codeaurora.org
DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 38D3FC433CA
From: Sibi Sankar <sibis@codeaurora.org>
To: p.zabel@pengutronix.de, robh+dt@kernel.org,
        bjorn.andersson@linaro.org
Cc: agross@kernel.org, mani@kernel.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        sboyd@kernel.org, Sibi Sankar <sibis@codeaurora.org>
Subject: [PATCH 0/6] Enable miscellaneous hardware blocks to boot WPSS
Date: Tue,  9 Mar 2021 11:21:45 +0530
Message-Id: <1615269111-25559-1-git-send-email-sibis@codeaurora.org>
Precedence: bulk

Series

Enable miscellaneous hardware blocks to boot WPSS | expand

Message

Sibi Sankar March 9, 2021, 5:51 a.m. UTC

This series enables miscellaneous hardware blocks to boot Wireless
Processor Subsystem (WPSS) on SC7280 SoC.

[1] https://lore.kernel.org/patchwork/cover/1389010/
The series depends on ^^

Sibi Sankar (6):
  soc: qcom: smem: Update max processor count
  dt-bindings: mailbox: Add WPSS client index to IPCC
  dt-bindings: reset: aoss: Add AOSS reset controller binding
  dt-bindings: reset: pdc: Add PDC Global bindings
  reset: qcom: Add PDC Global reset signals for WPSS
  arm64: dts: qcom: sc7280: Add nodes to boot WPSS

 .../devicetree/bindings/reset/qcom,aoss-reset.yaml |   5 +
 .../devicetree/bindings/reset/qcom,pdc-global.yaml |   4 +
 arch/arm64/boot/dts/qcom/sc7280.dtsi               | 143 +++++++++++++++++++++
 drivers/reset/reset-qcom-pdc.c                     |  62 +++++++--
 drivers/soc/qcom/smem.c                            |   2 +-
 include/dt-bindings/mailbox/qcom-ipcc.h            |   1 +
 include/dt-bindings/reset/qcom,sdm845-pdc.h        |   2 +
 7 files changed, 207 insertions(+), 12 deletions(-)