From patchwork Tue Apr 6 05:09:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Manikandan X-Patchwork-Id: 12184157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76606C433ED for ; Tue, 6 Apr 2021 05:10:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 33701613BE for ; Tue, 6 Apr 2021 05:10:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242477AbhDFFK1 (ORCPT ); Tue, 6 Apr 2021 01:10:27 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:26087 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230073AbhDFFK1 (ORCPT ); Tue, 6 Apr 2021 01:10:27 -0400 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 05 Apr 2021 22:10:19 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 05 Apr 2021 22:10:18 -0700 X-QCInternal: smtphost Received: from mkrishn-linux.qualcomm.com ([10.204.66.35]) by ironmsg02-blr.qualcomm.com with ESMTP; 06 Apr 2021 10:39:58 +0530 Received: by mkrishn-linux.qualcomm.com (Postfix, from userid 438394) id 7B1C021B31; Tue, 6 Apr 2021 10:39:56 +0530 (IST) From: Krishna Manikandan To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org Cc: Krishna Manikandan , linux-kernel@vger.kernel.org, robdclark@gmail.com, kalyan_t@codeaurora.org, dianders@chromium.org Subject: [PATCH v1 0/4] Add display support for SC7280 target Date: Tue, 6 Apr 2021 10:39:48 +0530 Message-Id: <1617685792-14376-1-git-send-email-mkrishn@codeaurora.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The changes in this series adds all the required support for display driver for SC7280 target. In addition to the basic catalog changes, changes are added to accommodate new registers for SC7280 target. SC7280 target comes under next generation targets. The register differences in SC7280 when compared to SC7180 are mentioned below: - SC7280 uses UBWC3.0 and changes are added to program the ubwc static registers properly - Pingpong dither block offset value has changed for SC7280 family. Separate sub block is defined for sc7280 pingpong block and changes are added to handle this. - Interface offsets are different for SC7280 family. These offset values are used to access the interface irq registers. Changes are added to handle this based on the target. - A new register called CTL_FETCH_PIPE_ACTIVE is introduced in SC7280 family, which tells the HW about the active pipes in the CTL path. Changes are added to program this register based on the active pipes in the current composition. - Changes are added to program INTF_CONFIG2 properly since the reset value of this register has changed in SC7280 family and we need to explicitly program it with correct values to avoid wrong interface configuration. - INTF_5 is added to intf configuration to support EDP. Krishna Manikandan (4): drm/msm/disp/dpu1: add support for display for SC7280 target drm/msm/disp/dpu1: add intf offsets for SC7280 target drm/msm/disp/dpu1: add support to program fetch active in ctl path drm/msm/disp/dpu1: enable DATA_HCTL_EN for sc7280 target drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 176 ++++++++++++++++++++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 27 ++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 20 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 11 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 6 +- drivers/gpu/drm/msm/msm_drv.c | 4 +- 10 files changed, 242 insertions(+), 24 deletions(-)