| Message ID | 20181208170216.32555-1-georgi.djakov@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | Introduce on-chip interconnect API | expand |
Hi Georgi, On Sat, Dec 8, 2018 at 9:02 AM Georgi Djakov <georgi.djakov@linaro.org> wrote: > > Modern SoCs have multiple processors and various dedicated cores (video, gpu, > graphics, modem). These cores are talking to each other and can generate a > lot of data flowing through the on-chip interconnects. These interconnect > buses could form different topologies such as crossbar, point to point buses, > hierarchical buses or use the network-on-chip concept. > > These buses have been sized usually to handle use cases with high data > throughput but it is not necessary all the time and consume a lot of power. > Furthermore, the priority between masters can vary depending on the running > use case like video playback or CPU intensive tasks. > > Having an API to control the requirement of the system in terms of bandwidth > and QoS, so we can adapt the interconnect configuration to match those by > scaling the frequencies, setting link priority and tuning QoS parameters. > This configuration can be a static, one-time operation done at boot for some > platforms or a dynamic set of operations that happen at run-time. > > This patchset introduce a new API to get the requirement and configure the > interconnect buses across the entire chipset to fit with the current demand. > The API is NOT for changing the performance of the endpoint devices, but only > the interconnect path in between them. > > The API is using a consumer/provider-based model, where the providers are > the interconnect buses and the consumers could be various drivers. > The consumers request interconnect resources (path) to an endpoint and set > the desired constraints on this data flow path. The provider(s) receive > requests from consumers and aggregate these requests for all master-slave > pairs on that path. Then the providers configure each participating in the > topology node according to the requested data flow path, physical links and > constraints. The topology could be complicated and multi-tiered and is SoC > specific. This patch series description fails to describe why you need a brand new subsystem for this instead of either using one of the current ones, or adapting it to fit the needs you have. Primarily, I'm wondering what's missing from drivers/devfreq to fit your needs? The series also doesn't seem to provide any kind of indication how this will be used by end points. You have one driver for one SoC that just contains large tables that are parsed at probe time, but no driver hooks anywhere that will actually change any settings depending on use cases. Also, the bindings as posted don't seem to include any of this kind of information. So it's hard to get a picture of how this is going to be used in reality, which makes it hard to judge whether it is a good solution or not. Overall, exposing all of this to software is obviously a nightmare from a complexity point of view, and one in which it will surely be very very hard to make the system behave properly for generic workloads beyond benchmark tuning. Having more information about the above would definitely help tell if this whole effort is a step in the right direction, or if it is needless complexity that is better solved in other ways. -Olof
Hi Olof, On 9.12.18 2:33, Olof Johansson wrote: > Hi Georgi, > > On Sat, Dec 8, 2018 at 9:02 AM Georgi Djakov <georgi.djakov@linaro.org> wrote: >> >> Modern SoCs have multiple processors and various dedicated cores (video, gpu, >> graphics, modem). These cores are talking to each other and can generate a >> lot of data flowing through the on-chip interconnects. These interconnect >> buses could form different topologies such as crossbar, point to point buses, >> hierarchical buses or use the network-on-chip concept. >> >> These buses have been sized usually to handle use cases with high data >> throughput but it is not necessary all the time and consume a lot of power. >> Furthermore, the priority between masters can vary depending on the running >> use case like video playback or CPU intensive tasks. >> >> Having an API to control the requirement of the system in terms of bandwidth >> and QoS, so we can adapt the interconnect configuration to match those by >> scaling the frequencies, setting link priority and tuning QoS parameters. >> This configuration can be a static, one-time operation done at boot for some >> platforms or a dynamic set of operations that happen at run-time. >> >> This patchset introduce a new API to get the requirement and configure the >> interconnect buses across the entire chipset to fit with the current demand. >> The API is NOT for changing the performance of the endpoint devices, but only >> the interconnect path in between them. >> >> The API is using a consumer/provider-based model, where the providers are >> the interconnect buses and the consumers could be various drivers. >> The consumers request interconnect resources (path) to an endpoint and set >> the desired constraints on this data flow path. The provider(s) receive >> requests from consumers and aggregate these requests for all master-slave >> pairs on that path. Then the providers configure each participating in the >> topology node according to the requested data flow path, physical links and >> constraints. The topology could be complicated and multi-tiered and is SoC >> specific. > > This patch series description fails to describe why you need a brand > new subsystem for this instead of either using one of the current > ones, or adapting it to fit the needs you have. > > Primarily, I'm wondering what's missing from drivers/devfreq to fit your needs? The devfreq subsystem seems to be more oriented towards a device (like GPU or CPU) that controls the power/performance characteristics by itself and not the performance of other devices. The main problem of using it is that it's using a reactive approach - for example monitor some performance counters and then reconfigure bandwidth after some bottleneck has already occurred. This is suboptimal and might not work well. The new solution does the opposite by allowing drivers to express their needs in advance and be proactive. Devfreq also does not seem suitable for configuring complex, multi-tiered bus topologies and aggregating constraints provided by drivers. > The series also doesn't seem to provide any kind of indication how > this will be used by end points. You have one driver for one SoC that > just contains large tables that are parsed at probe time, but no > driver hooks anywhere that will actually change any settings depending > on use cases. Also, the bindings as posted don't seem to include any > of this kind of information. So it's hard to get a picture of how this > is going to be used in reality, which makes it hard to judge whether > it is a good solution or not. Here are links to some of the examples that are on the mailing list already. I really should have included them in the cover letter. https://lkml.org/lkml/2018/12/7/584 https://lkml.org/lkml/2018/10/11/499 https://lkml.org/lkml/2018/9/20/986 https://lkml.org/lkml/2018/11/22/772 Platforms drivers for different SoCs are available: https://lkml.org/lkml/2018/11/17/368 https://lkml.org/lkml/2018/8/10/380 There is a discussion on linux-pm about supporting also Tegra platforms in addition to NXP and Qualcomm. > Overall, exposing all of this to software is obviously a nightmare > from a complexity point of view, and one in which it will surely be > very very hard to make the system behave properly for generic > workloads beyond benchmark tuning. It allows the consumer drivers to dynamically express their performance needs in the system in a more fine grained way (if they want/need to) and this helps the system to keep the lowest power profile. This has already been done for a long time in various different kernels shipping with Android devices, for example, and basically every vendor uses a different custom approach. So I believe that this is doing the generalization that was needed. > Having more information about the above would definitely help tell if > this whole effort is a step in the right direction, or if it is > needless complexity that is better solved in other ways. Sure, hope that this answers your questions. Thanks, Georgi > > -Olof >
Hi Olof, Georgi, Happy new year! :-) Quoting Georgi Djakov (2018-12-08 21:15:35) > Hi Olof, > > On 9.12.18 2:33, Olof Johansson wrote: > > Hi Georgi, > > > > On Sat, Dec 8, 2018 at 9:02 AM Georgi Djakov <georgi.djakov@linaro.org> wrote: > >> > >> Modern SoCs have multiple processors and various dedicated cores (video, gpu, > >> graphics, modem). These cores are talking to each other and can generate a > >> lot of data flowing through the on-chip interconnects. These interconnect > >> buses could form different topologies such as crossbar, point to point buses, > >> hierarchical buses or use the network-on-chip concept. > >> > >> These buses have been sized usually to handle use cases with high data > >> throughput but it is not necessary all the time and consume a lot of power. > >> Furthermore, the priority between masters can vary depending on the running > >> use case like video playback or CPU intensive tasks. > >> > >> Having an API to control the requirement of the system in terms of bandwidth > >> and QoS, so we can adapt the interconnect configuration to match those by > >> scaling the frequencies, setting link priority and tuning QoS parameters. > >> This configuration can be a static, one-time operation done at boot for some > >> platforms or a dynamic set of operations that happen at run-time. > >> > >> This patchset introduce a new API to get the requirement and configure the > >> interconnect buses across the entire chipset to fit with the current demand. > >> The API is NOT for changing the performance of the endpoint devices, but only > >> the interconnect path in between them. > >> > >> The API is using a consumer/provider-based model, where the providers are > >> the interconnect buses and the consumers could be various drivers. > >> The consumers request interconnect resources (path) to an endpoint and set > >> the desired constraints on this data flow path. The provider(s) receive > >> requests from consumers and aggregate these requests for all master-slave > >> pairs on that path. Then the providers configure each participating in the > >> topology node according to the requested data flow path, physical links and > >> constraints. The topology could be complicated and multi-tiered and is SoC > >> specific. > > > > This patch series description fails to describe why you need a brand > > new subsystem for this instead of either using one of the current > > ones, or adapting it to fit the needs you have. > > > > Primarily, I'm wondering what's missing from drivers/devfreq to fit your needs? > > The devfreq subsystem seems to be more oriented towards a device (like > GPU or CPU) that controls the power/performance characteristics by > itself and not the performance of other devices. The main problem of > using it is that it's using a reactive approach - for example monitor > some performance counters and then reconfigure bandwidth after some > bottleneck has already occurred. This is suboptimal and might not work > well. The new solution does the opposite by allowing drivers to > express their needs in advance and be proactive. Devfreq also does not > seem suitable for configuring complex, multi-tiered bus topologies and > aggregating constraints provided by drivers. [reflowed Georgi's responses] Agreed that devfreq is not good for this. Like any good driver framework, the interconnect framework provides a client/consumer api to device drivers to express their needs (in this case, throughput over a bus or interconnect). On modern SoCs these topologies can be quite complicated, which requires a provider api. I think that a dedicated framework makes sense for this. > > > The series also doesn't seem to provide any kind of indication how > > this will be used by end points. You have one driver for one SoC that > > just contains large tables that are parsed at probe time, but no > > driver hooks anywhere that will actually change any settings depending > > on use cases. Also, the bindings as posted don't seem to include any > > of this kind of information. So it's hard to get a picture of how this > > is going to be used in reality, which makes it hard to judge whether > > it is a good solution or not. > > Here are links to some of the examples that are on the mailing list > already. I really should have included them in the cover letter. > https://lkml.org/lkml/2018/12/7/584 > https://lkml.org/lkml/2018/10/11/499 > https://lkml.org/lkml/2018/9/20/986 > https://lkml.org/lkml/2018/11/22/772 > > Platforms drivers for different SoCs are available: > https://lkml.org/lkml/2018/11/17/368 > https://lkml.org/lkml/2018/8/10/380 > There is a discussion on linux-pm about supporting also Tegra > platforms in addition to NXP and Qualcomm. Just FYI, Alex will renew his efforts to port iMX over to this framework after the new year. I honestly don't know if this series is ready to be merged or not. I stopped reviewing it a long time ago. But there is interest in the need that it addresses for sure. > > > Overall, exposing all of this to software is obviously a nightmare > > from a complexity point of view, and one in which it will surely be > > very very hard to make the system behave properly for generic > > workloads beyond benchmark tuning. Detailed SoC glue controlled by Linux is always a nightmare. This typically falls into the power management bucket: functional clocks and interface clocks, clock domains, voltage control, scalable power islands (for both idle & active use cases), master initiators and slave targets across interconnects, configuring wake-up capable interrupts and handling them, handling dynamic dependencies such as register spaces that are not clocked/powered and must be enabled before read/write access, reading eFuses and defining operating points at runtime, and the inevitable "system controllers" that are a grab bag of whatever the SoC designers couldn't fit elsewhere... This stuff is all a nightmare to handle in Linux, and upstream Linux still lacks the expressiveness to address much of it. Until the SoC designers replace it all with firmware or a dedicated PM microcontroller or whatever, we'll need to model it and implement it as driver frameworks. This is an attempt to do so upstream, which I support. > > It allows the consumer drivers to dynamically express their > performance needs in the system in a more fine grained way (if they > want/need to) and this helps the system to keep the lowest power > profile. This has already been done for a long time in various > different kernels shipping with Android devices, for example, and > basically every vendor uses a different custom approach. So I believe > that this is doing the generalization that was needed. Correct, everyone does this out of tree. For example: https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm/mach-imx/busfreq-imx.c?h=imx_4.14.62_1.0.0_beta See you in 2019, Mike > > > Having more information about the above would definitely help tell if > > this whole effort is a step in the right direction, or if it is > > needless complexity that is better solved in other ways. > > Sure, hope that this answers your questions. > > Thanks, > Georgi > > > > > -Olof > > >
Modern SoCs have multiple processors and various dedicated cores (video, gpu, graphics, modem). These cores are talking to each other and can generate a lot of data flowing through the on-chip interconnects. These interconnect buses could form different topologies such as crossbar, point to point buses, hierarchical buses or use the network-on-chip concept. These buses have been sized usually to handle use cases with high data throughput but it is not necessary all the time and consume a lot of power. Furthermore, the priority between masters can vary depending on the running use case like video playback or CPU intensive tasks. Having an API to control the requirement of the system in terms of bandwidth and QoS, so we can adapt the interconnect configuration to match those by scaling the frequencies, setting link priority and tuning QoS parameters. This configuration can be a static, one-time operation done at boot for some platforms or a dynamic set of operations that happen at run-time. This patchset introduce a new API to get the requirement and configure the interconnect buses across the entire chipset to fit with the current demand. The API is NOT for changing the performance of the endpoint devices, but only the interconnect path in between them. The API is using a consumer/provider-based model, where the providers are the interconnect buses and the consumers could be various drivers. The consumers request interconnect resources (path) to an endpoint and set the desired constraints on this data flow path. The provider(s) receive requests from consumers and aggregate these requests for all master-slave pairs on that path. Then the providers configure each participating in the topology node according to the requested data flow path, physical links and constraints. The topology could be complicated and multi-tiered and is SoC specific. Below is a simplified diagram of a real-world SoC topology. The interconnect providers are the NoCs. +----------------+ +----------------+ | HW Accelerator |--->| M NoC |<---------------+ +----------------+ +----------------+ | | | +------------+ +-----+ +-------------+ V +------+ | | | DDR | | +--------+ | PCIe | | | +-----+ | | Slaves | +------+ | | ^ ^ | +--------+ | | C NoC | | | V V | | +------------------+ +------------------------+ | | +-----+ | |-->| |-->| |-->| CPU | | |-->| |<--| | +-----+ | Mem NoC | | S NoC | +------------+ | |<--| |---------+ | | |<--| |<------+ | | +--------+ +------------------+ +------------------------+ | | +-->| Slaves | ^ ^ ^ ^ ^ | | +--------+ | | | | | | V +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+ | CPUs | | | GPU | | DSP | | Masters |-->| P NoC |-->| Slaves | +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+ | +-------+ | Modem | +-------+ TODO: * Create a followup patch to revert to previous bandwidth configuration if any of the requests fails to apply. * Create icc_set_extended() to handle parameters such as latency and other QoS values. Nvidia and Qcom guys are interested in this. * Cache the path between the nodes instead of walking the graph on each get(). * Sync interconnect requests with the idle state of the device. Changes since patchset v11 (https://lkml.org/lkml/2018/12/7/491) * Squashed the newly introduced in v11 patch 8 into patch 5 to keep things bisectable. (Quentin Perret, Doug Anderson) * Wrapped commit message of patch 2 to 75 chars. Changes since patchset v10 (https://lkml.org/lkml/2018/11/28/2) * Addressed comments from Joe Perches. * Addressed comments from Evan Green and picked Reviewed-by. * Changed the name of the DT node from qnoc to interconnect. * Minor changes - typos, whitespaces etc. * Added a new patch to adjust the sdm845 provider driver to the recently changed cmd_db API in linux-next. Changes since patchset v9 (https://lkml.org/lkml/2018/8/31/444) * Converted from using global node identifiers to local per provider ids. * Dropped msm8916 platform driver until we figure out DT bindings. * Included sdm845 platform driver instead. * Added macros for converting to mbps, gbps, etc. to icc units. * Added comments about aggregation, other minor changes. * Fixed uninitialized variable. (Gustavo A. R. Silva) * Removed set but not used variable. (YueHaibing) * Fixed build error without DEBUGFS. (Arnd Bergmann) Changes since patchset v8 (https://lkml.org/lkml/2018/8/10/387) * Fixed the names of the files when built as modules. * Corrected some typos in comments. Changes since patchset v7 (https://lkml.org/lkml/2018/7/31/647) * Addressed comments on kernel-doc and grammar. (Randy) * Picked Reviewed-by: Evan * Squashed consumer and provider DT bindings into single patch. (Rob) * Cleaned-up msm8916 DT bindings docs by removing unused port ids. * Updated documentation for the cases when NULL is returned. (Saravana) * New patch to add myself as maintainer. Changes since patchset v6 (https://lkml.org/lkml/2018/7/9/698) * [patches 1,6]: Move the aggregation within the provider from the framework to the platform driver's set() callback, as the aggregation point could be SoC specific. * [patch 1]: Include missing header, reset state only of the traversed nodes, move more code into path_init(), add more asserts, move misplaced mutex, simplify icc_link_destroy() (Evan) * [patch 1]: Fix the order of requests to go from source to destination. (Alex) * [patch 7]: Use better wording in the documentation. (Evan) * [patch 6]: Reorder struct members, sort nodes alphabetically, improve naming of variables , add missing clk_disable_unprepare() in error paths. (Matthias) * [patch 6]: Remove redundant NULL pointer check in msm8916 driver. (Alex) * [patch 6]: Add missing depend on QCOM_SMD_RPM in Kconfig. (Evan) * [patch 3]: Don't check for errors on debugfs calls, remove debugfs directory when module is unloaded (Greg) Changes since patchset v5 (https://lkml.org/lkml/2018/6/20/453) * Fix the modular build, make rpm-smd driver a module. * Optimize locking and move to higher level. (Evan) * Code cleanups. Fix typos. (Evan, Matthias) * Add the source node to the path. (Evan) * Rename path_allocate() to path_init() with minor refactoring. (Evan) * Rename *_remove() functions to *_destroy(). * Return fixed errors in icc_link_destroy(). (Evan) * Fix krealloc() usage in icc_link_destroy(). (Evan) * Add missing kfree() in icc_node_create(). (Matthias) * Make icc_node_add() return void. (Matthias) * Change mutex_init to mutex_lock in icc_provider_add(). (Matthias) * Add new icc_node_del() function to delete nodes from provider. * Fix the header guard to reflect the path in smd-rpm.h. (Evan) * Check for errors returned by qcom_icc_rpm_smd_send(). (Evan) * Propagate the error of icc_provider_del(). (Evan) Changes since patchset v4 (https://lkml.org/lkml/2018/3/9/856) * Simplified locking by using a single global mutex. (Evan) * Changed the aggregation function interface. * Implemented functions for node, link, provider removal. (Evan) * Naming changes on variables and functions, removed redundant code. (Evan) * Fixes and clarifications in the docs. (Matthias, Evan, Amit, Alexandre) * Removed mandatory reg DT property, made interconnect-names optional. (Bjorn) * Made interconnect-cells property required to align with other bindings. (Neil) * Moved msm8916 specific bindings into a separate file and patch. (Bjorn) * Use the names, instead of the hardcoded ids for topology. (Matthias) * Init the node before creating the links. (Evan) * Added icc_units_to_bps macro. (Amit) Changes since patchset v3 (https://lkml.org/lkml/2017/9/8/544) * Refactored the constraints aggregation. * Use the IDR API. * Split the provider and consumer bindings into separate patches and propose new bindings for consumers, which allows to specify the local source port. * Adopted the icc_ prefix for API functions. * Introduced separate API functions for creating interconnect nodes and links. * Added DT lookup support in addition to platform data. * Dropped the event tracing patch for now. * Added a patch to provide summary via debugfs. * Use macro for the list of topology definitions in the platform driver. * Various minor changes. Changes since patchset v2 (https://lkml.org/lkml/2017/7/20/825) * Split the aggregation into per node and per provider. Cache the aggregated values. * Various small refactorings and cleanups in the framework. * Added a patch introducing basic tracepoint support for monitoring the time required to update the interconnect nodes. Changes since patchset v1 (https://lkml.org/lkml/2017/6/27/890) * Updates in the documentation. * Changes in request aggregation, locking. * Dropped the aggregate() callback and use the default as it currently sufficient for the single vendor driver. Will add it later when needed. * Dropped the dt-bindings draft patch for now. Changes since RFC v2 (https://lkml.org/lkml/2017/6/12/316) * Converted documentation to rst format. * Fixed an incorrect call to mutex_lock. Renamed max_bw to peak_bw. Changes since RFC v1 (https://lkml.org/lkml/2017/5/15/605) * Refactored code into shorter functions. * Added a new aggregate() API function. * Rearranged some structs to reduce padding bytes. Changes since RFC v0 (https://lkml.org/lkml/2017/3/1/599) * Removed DT support and added optional Patch 3 with new bindings proposal. * Converted the topology into internal driver data. * Made the framework modular. * interconnect_get() now takes (src and dst ports as arguments). * Removed public declarations of some structs. * Now passing prev/next nodes to the vendor driver. * Properly remove requests on _put(). * Added refcounting. * Updated documentation. * Changed struct interconnect_path to use array instead of linked list. David Dai (2): interconnect: qcom: Add sdm845 interconnect provider driver arm64: dts: sdm845: Add interconnect provider DT nodes Georgi Djakov (5): interconnect: Add generic on-chip interconnect API dt-bindings: Introduce interconnect binding interconnect: Allow endpoints translation via DT interconnect: Add debugfs support MAINTAINERS: add a maintainer for the interconnect API .../bindings/interconnect/interconnect.txt | 60 ++ .../bindings/interconnect/qcom,sdm845.txt | 24 + Documentation/interconnect/interconnect.rst | 94 ++ MAINTAINERS | 10 + arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/interconnect/Kconfig | 15 + drivers/interconnect/Makefile | 6 + drivers/interconnect/core.c | 787 ++++++++++++++++ drivers/interconnect/qcom/Kconfig | 13 + drivers/interconnect/qcom/Makefile | 5 + drivers/interconnect/qcom/sdm845.c | 838 ++++++++++++++++++ .../dt-bindings/interconnect/qcom,sdm845.h | 143 +++ include/linux/interconnect-provider.h | 142 +++ include/linux/interconnect.h | 59 ++ 16 files changed, 2204 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/interconnect.txt create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sdm845.txt create mode 100644 Documentation/interconnect/interconnect.rst create mode 100644 drivers/interconnect/Kconfig create mode 100644 drivers/interconnect/Makefile create mode 100644 drivers/interconnect/core.c create mode 100644 drivers/interconnect/qcom/Kconfig create mode 100644 drivers/interconnect/qcom/Makefile create mode 100644 drivers/interconnect/qcom/sdm845.c create mode 100644 include/dt-bindings/interconnect/qcom,sdm845.h create mode 100644 include/linux/interconnect-provider.h create mode 100644 include/linux/interconnect.h