| Message ID | 20200817220238.603465-1-robdclark@gmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | iommu/arm-smmu + drm/msm: per-process GPU pgtables | expand |
On Mon, Aug 17, 2020 at 03:01:25PM -0700, Rob Clark wrote: > Jordan Crouse (12): > iommu/arm-smmu: Pass io-pgtable config to implementation specific > function > iommu/arm-smmu: Add support for split pagetables > iommu/arm-smmu: Prepare for the adreno-smmu implementation > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > drm/msm: Add a context pointer to the submitqueue > drm/msm: Drop context arg to gpu->submit() > drm/msm: Set the global virtual address range from the IOMMU domain > drm/msm: Add support to create a local pagetable > drm/msm: Add support for private address space instances > drm/msm/a6xx: Add support for per-instance pagetables > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > Rob Clark (8): > drm/msm: remove dangling submitqueue references > iommu: add private interface for adreno-smmu > drm/msm/gpu: add dev_to_gpu() helper > drm/msm: set adreno_smmu as gpu's drvdata > iommu/arm-smmu: constify some helpers > arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU > iommu/arm-smmu: add a way for implementations to influence SCTLR > drm/msm: show process names in gem_describe Can the DRM parts be merged independently from the IOMMU parts or does this need to be queued together? If it needs to be together I defer the decission to Will through which tree this should go. Joerg
On Fri, Sep 4, 2020 at 2:11 AM Joerg Roedel <joro@8bytes.org> wrote: > > On Mon, Aug 17, 2020 at 03:01:25PM -0700, Rob Clark wrote: > > Jordan Crouse (12): > > iommu/arm-smmu: Pass io-pgtable config to implementation specific > > function > > iommu/arm-smmu: Add support for split pagetables > > iommu/arm-smmu: Prepare for the adreno-smmu implementation > > iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU > > dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU > > drm/msm: Add a context pointer to the submitqueue > > drm/msm: Drop context arg to gpu->submit() > > drm/msm: Set the global virtual address range from the IOMMU domain > > drm/msm: Add support to create a local pagetable > > drm/msm: Add support for private address space instances > > drm/msm/a6xx: Add support for per-instance pagetables > > arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU > > > > Rob Clark (8): > > drm/msm: remove dangling submitqueue references > > iommu: add private interface for adreno-smmu > > drm/msm/gpu: add dev_to_gpu() helper > > drm/msm: set adreno_smmu as gpu's drvdata > > iommu/arm-smmu: constify some helpers > > arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU > > iommu/arm-smmu: add a way for implementations to influence SCTLR > > drm/msm: show process names in gem_describe > > Can the DRM parts be merged independently from the IOMMU parts or does > this need to be queued together? If it needs to be together I defer the > decission to Will through which tree this should go. > Hi, v16 of this series re-ordered the patches and has some notes at the top of the cover letter[1] about a potential way to land it.. tl;dr: the drm parts can and adreno-smmu-priv.h can go independently of iommu. And the first four iommu patches can go in independently of drm. But the last two iommu patches have a dependency on the drm patches. Note that I'll send one more revision of the series shortly (I have a small fixup for one of the drm patches for an issue found in testing, and Bjorn had some suggestions about "iommu/arm-smmu: Prepare for the adreno-smmu implementation" that I need to look at. BR, -R [1] https://lkml.org/lkml/2020/9/1/1469
From: Rob Clark <robdclark@chromium.org> This series adds an Adreno SMMU implementation to arm-smmu to allow GPU hardware pagetable switching. The Adreno GPU has built in capabilities to switch the TTBR0 pagetable during runtime to allow each individual instance or application to have its own pagetable. In order to take advantage of the HW capabilities there are certain requirements needed of the SMMU hardware. This series adds support for an Adreno specific arm-smmu implementation. The new implementation 1) ensures that the GPU domain is always assigned context bank 0, 2) enables split pagetable support (TTBR1) so that the instance specific pagetable can be swapped while the global memory remains in place and 3) shares the current pagetable configuration with the GPU driver to allow it to create its own io-pgtable instances. The series then adds the drm/msm code to enable these features. For targets that support it allocate new pagetables using the io-pgtable configuration shared by the arm-smmu driver and swap them in during runtime. This version of the series merges the previous patchset(s) [1] and [2] with the following improvements: v14: (Respin by Rob) - Minor update to 16/20 (only force ASID to zero in one place) - Addition of sc7180 dtsi patch. v13: (Respin by Rob) - Switch to a private interface between adreno-smmu and GPU driver, dropping the custom domain attr (Will Deacon) - Rework the SCTLR.HUPCF patch to add new fields in smmu_domain->cfg rather than adding new impl hook (Will Deacon) - Drop for_each_cfg_sme() in favor of plain for() loop (Will Deacon) - Fix context refcnt'ing issue which was causing problems with GPU crash recover stress testing. - Spiff up $debugfs/gem to show process information associated with VMAs v12: - Nitpick cleanups in gpu/drm/msm/msm_iommu.c (Rob Clark) - Reorg in gpu/drm/msm/msm_gpu.c (Rob Clark) - Use the default asid for the context bank so that iommu_tlb_flush_all works - Flush the UCHE after a page switch - Add the SCTLR.HUPCF patch at the end of the series v11: - Add implementation specific get_attr/set_attr functions (per Rob Clark) - Fix context bank allocation (per Bjorn Andersson) v10: - arm-smmu: add implementation hook to allocate context banks - arm-smmu: Match the GPU domain by stream ID instead of compatible string - arm-smmu: Make DOMAIN_ATTR_PGTABLE_CFG bi-directional. The leaf driver queries the configuration to create a pagetable and then sends the newly created configuration back to the smmu-driver to enable TTBR0 - drm/msm: Add context reference counting for submissions - drm/msm: Use dummy functions to skip TLB operations on per-instance pagetables [1] https://lists.linuxfoundation.org/pipermail/iommu/2020-June/045653.html [2] https://lists.linuxfoundation.org/pipermail/iommu/2020-June/045659.html Jordan Crouse (12): iommu/arm-smmu: Pass io-pgtable config to implementation specific function iommu/arm-smmu: Add support for split pagetables iommu/arm-smmu: Prepare for the adreno-smmu implementation iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU drm/msm: Add a context pointer to the submitqueue drm/msm: Drop context arg to gpu->submit() drm/msm: Set the global virtual address range from the IOMMU domain drm/msm: Add support to create a local pagetable drm/msm: Add support for private address space instances drm/msm/a6xx: Add support for per-instance pagetables arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU Rob Clark (8): drm/msm: remove dangling submitqueue references iommu: add private interface for adreno-smmu drm/msm/gpu: add dev_to_gpu() helper drm/msm: set adreno_smmu as gpu's drvdata iommu/arm-smmu: constify some helpers arm: dts: qcom: sc7180: Set the compatible string for the GPU SMMU iommu/arm-smmu: add a way for implementations to influence SCTLR drm/msm: show process names in gem_describe .../devicetree/bindings/iommu/arm,smmu.yaml | 4 + arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 68 +++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + drivers/gpu/drm/msm/adreno/adreno_device.c | 12 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 18 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +- drivers/gpu/drm/msm/msm_drv.c | 16 +- drivers/gpu/drm/msm/msm_drv.h | 25 +++ drivers/gpu/drm/msm/msm_gem.c | 25 ++- drivers/gpu/drm/msm/msm_gem.h | 6 + drivers/gpu/drm/msm/msm_gem_submit.c | 8 +- drivers/gpu/drm/msm/msm_gem_vma.c | 10 + drivers/gpu/drm/msm/msm_gpu.c | 41 +++- drivers/gpu/drm/msm/msm_gpu.h | 21 +- drivers/gpu/drm/msm/msm_gpummu.c | 2 +- drivers/gpu/drm/msm/msm_iommu.c | 206 +++++++++++++++++- drivers/gpu/drm/msm/msm_mmu.h | 16 +- drivers/gpu/drm/msm/msm_ringbuffer.h | 1 + drivers/gpu/drm/msm/msm_submitqueue.c | 7 +- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 6 +- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 155 ++++++++++++- drivers/iommu/arm/arm-smmu/arm-smmu.c | 102 ++++----- drivers/iommu/arm/arm-smmu/arm-smmu.h | 87 +++++++- include/linux/adreno-smmu-priv.h | 36 +++ 27 files changed, 759 insertions(+), 133 deletions(-) create mode 100644 include/linux/adreno-smmu-priv.h