| Message ID | 20220621160621.24415-1-y.oudjana@protonmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | clk: qcom: msm8996-cpu: Cleanup and migrate to parent_data | expand |
On Tue 21 Jun 11:06 CDT 2022, Yassine Oudjana wrote: > This series includes some cleanup of the MSM8996 CPU clock driver, as well as > migration from parent_names to parent_data for all of its clocks. The DT schema > is also fixed in this series to show the actual clocks consumed by the clock > controller and pass checks. This series looks almost ready to be merged, could you (or Dmitry?) update the two outstanding items? Thanks, Bjorn > > Yassine Oudjana (6): > clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX > clk: qcom: msm8996-cpu: Statically define PLL dividers > clk: qcom: msm8996-cpu: Unify cluster order > clk: qcom: msm8996-cpu: Convert secondary muxes to clk_regmap_mux > dt-bindings: clock: qcom,msm8996-apcc: Fix clocks > clk: qcom: msm8996-cpu: Use parent_data for all clocks > > .../bindings/clock/qcom,msm8996-apcc.yaml | 15 +- > drivers/clk/qcom/clk-cpu-8996.c | 235 ++++++++++-------- > 2 files changed, 140 insertions(+), 110 deletions(-) > > -- > 2.36.1 >
On 14/07/2022 00:32, Bjorn Andersson wrote: > On Tue 21 Jun 11:06 CDT 2022, Yassine Oudjana wrote: > >> This series includes some cleanup of the MSM8996 CPU clock driver, as well as >> migration from parent_names to parent_data for all of its clocks. The DT schema >> is also fixed in this series to show the actual clocks consumed by the clock >> controller and pass checks. > > This series looks almost ready to be merged, could you (or Dmitry?) > update the two outstanding items? I have acked the patch 2 and sent the slightly updated revision of patch6 (together with the rest of small changes). > > Thanks, > Bjorn > >> >> Yassine Oudjana (6): >> clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX >> clk: qcom: msm8996-cpu: Statically define PLL dividers >> clk: qcom: msm8996-cpu: Unify cluster order >> clk: qcom: msm8996-cpu: Convert secondary muxes to clk_regmap_mux >> dt-bindings: clock: qcom,msm8996-apcc: Fix clocks >> clk: qcom: msm8996-cpu: Use parent_data for all clocks >> >> .../bindings/clock/qcom,msm8996-apcc.yaml | 15 +- >> drivers/clk/qcom/clk-cpu-8996.c | 235 ++++++++++-------- >> 2 files changed, 140 insertions(+), 110 deletions(-) >> >> -- >> 2.36.1 >>
On 14/07/2022 13:06, Dmitry Baryshkov wrote: > On 14/07/2022 00:32, Bjorn Andersson wrote: >> On Tue 21 Jun 11:06 CDT 2022, Yassine Oudjana wrote: >> >>> This series includes some cleanup of the MSM8996 CPU clock driver, as >>> well as >>> migration from parent_names to parent_data for all of its clocks. The >>> DT schema >>> is also fixed in this series to show the actual clocks consumed by >>> the clock >>> controller and pass checks. >> >> This series looks almost ready to be merged, could you (or Dmitry?) >> update the two outstanding items? > > I have acked the patch 2 and sent the slightly updated revision of > patch6 (together with the rest of small changes). Bjorn, could you please pick up patches 1-5? > >> >> Thanks, >> Bjorn >> >>> >>> Yassine Oudjana (6): >>> clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX >>> clk: qcom: msm8996-cpu: Statically define PLL dividers >>> clk: qcom: msm8996-cpu: Unify cluster order >>> clk: qcom: msm8996-cpu: Convert secondary muxes to clk_regmap_mux >>> dt-bindings: clock: qcom,msm8996-apcc: Fix clocks >>> clk: qcom: msm8996-cpu: Use parent_data for all clocks >>> >>> .../bindings/clock/qcom,msm8996-apcc.yaml | 15 +- >>> drivers/clk/qcom/clk-cpu-8996.c | 235 ++++++++++-------- >>> 2 files changed, 140 insertions(+), 110 deletions(-) >>> >>> -- >>> 2.36.1 >>> > >
On Tue, 21 Jun 2022 20:06:15 +0400, Yassine Oudjana wrote: > This series includes some cleanup of the MSM8996 CPU clock driver, as well as > migration from parent_names to parent_data for all of its clocks. The DT schema > is also fixed in this series to show the actual clocks consumed by the clock > controller and pass checks. > > Yassine Oudjana (6): > clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX > clk: qcom: msm8996-cpu: Statically define PLL dividers > clk: qcom: msm8996-cpu: Unify cluster order > clk: qcom: msm8996-cpu: Convert secondary muxes to clk_regmap_mux > dt-bindings: clock: qcom,msm8996-apcc: Fix clocks > clk: qcom: msm8996-cpu: Use parent_data for all clocks > > [...] Applied, thanks! [1/6] clk: qcom: msm8996-cpu: Rename DIV_2_INDEX to SMUX_INDEX commit: 1ba0a3bbd5ed5a1bb8d0165912d9904b812af74b [2/6] clk: qcom: msm8996-cpu: Statically define PLL dividers commit: de37e0214c28330cf0dbf4fe51db1d9d38c13c93 [3/6] clk: qcom: msm8996-cpu: Unify cluster order commit: 382139bfd68fe6cc9dc94ffe3b9d783b85be3b1c [4/6] clk: qcom: msm8996-cpu: Convert secondary muxes to clk_regmap_mux commit: 9a9f5f9a5a0ca3f463eb28ba5920a6fd18dc9956 [5/6] dt-bindings: clock: qcom,msm8996-apcc: Fix clocks commit: b4feed4a3d0a6b8cef4a574a9df707c556928ec2 Best regards,