| Message ID | 20230512122134.24339-1-quic_kbajaj@quicinc.com (mailing list archive) |
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From: Komal Bajaj <quic_kbajaj@quicinc.com>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Komal Bajaj <quic_kbajaj@quicinc.com>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v3 00/10] soc: qcom: llcc: Add support for QDU1000/QRU1000
Date: Fri, 12 May 2023 17:51:24 +0530
Message-Id: <20230512122134.24339-1-quic_kbajaj@quicinc.com>
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| Series |
soc: qcom: llcc: Add support for QDU1000/QRU1000
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expand
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On 12/05/2023 14:21, Komal Bajaj wrote: > This patch series does the following - > * Add support for reading secure fuse region in qfprom driver > * Add support for qfprom on QDU1000 and QRU1000 SoCs > * Refactor LLCC driver to support multiple configuration > * Add support for multi channel DDR configuration in LLCC > * Add LLCC support for the Qualcomm QDU1000 and QRU1000 SoCs > > Changes in v3- > - Addressed comments from Krzysztof and Mani. Please be more specific, what exactly changed. Best regards, Krzysztof
This patch series does the following - * Add support for reading secure fuse region in qfprom driver * Add support for qfprom on QDU1000 and QRU1000 SoCs * Refactor LLCC driver to support multiple configuration * Add support for multi channel DDR configuration in LLCC * Add LLCC support for the Qualcomm QDU1000 and QRU1000 SoCs Changes in v3- - Addressed comments from Krzysztof and Mani. - Using qfprom to read DDR configuration from feature register. Changes in v2: - Addressing comments from Konrad. Komal Bajaj (10): nvmem: qfprom: Add support for secure reading dt-bindings: nvmem: qfprom: Add compatible for QDU1000/QRU1000 arm64: dts: qcom: qdu1000: Add properties to qfprom for multi channel DDR nvmem: qfprom: Add support for secure reading on QDU1000/QRU1000 soc: qcom: llcc: Refactor llcc driver to support multiple configuration soc: qcom: Add LLCC support for multi channel DDR dt-bindings: arm: msm: Add LLCC compatible for QDU1000/QRU1000 Revert "arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller" arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller soc: qcom: llcc: Add QDU1000 and QRU1000 LLCC support .../devicetree/bindings/cache/qcom,llcc.yaml | 2 + .../bindings/nvmem/qcom,qfprom.yaml | 1 + arch/arm64/boot/dts/qcom/qdu1000.dtsi | 30 +- drivers/nvmem/qfprom.c | 74 ++++- drivers/soc/qcom/llcc-qcom.c | 304 +++++++++++++----- include/linux/soc/qcom/llcc-qcom.h | 2 +- 6 files changed, 301 insertions(+), 112 deletions(-)