From patchwork Sun Jun 25 20:25:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13292104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1ECDC0015E for ; Sun, 25 Jun 2023 20:25:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230044AbjFYUZy (ORCPT ); Sun, 25 Jun 2023 16:25:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230054AbjFYUZy (ORCPT ); Sun, 25 Jun 2023 16:25:54 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57D241B9 for ; Sun, 25 Jun 2023 13:25:51 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4f8735ac3e3so3375139e87.2 for ; Sun, 25 Jun 2023 13:25:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687724749; x=1690316749; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=jM8O0hSMy/hliZKLd+M06pcWLRDESz+CUKduJCXbalM=; b=G8ckCwOA+Jy1hFd04szW6yhJCgvUgyyOwRHbosrkKU9tfZ1hacMw7mm5J6etXI2Sjt g3fkyvS2Pvtw36JyEm5clQ5hNETfEvkn9v3koB6GzuyGI2s2FjBkgN51CuuZUjQCAhLd Hoc3j8oU6SenRmd49VIcg3fHp6AIqKE6BIDtbvSkWIW/BKb7coeWmSsT9lzPygheYHsA rrX1WHQbnFoEOTeZHqaKggQKjopF/KTXDr1Ai0cJcit4Aq5kfh0z3Yw9nl02OWg2FGU8 LnOZxUrXY/nBylSqlfRrtJsgbwZ5WmpDE87cGiZXrpfSW2qSxjZfYuDKh91wmge9WIMx xFoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687724749; x=1690316749; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=jM8O0hSMy/hliZKLd+M06pcWLRDESz+CUKduJCXbalM=; b=UZQBcETu4GMm2px9hbugEaU470jd+OeGFmEa7z5Q2dRjuf7T4NIH9kBs77fwLL1TG2 QkT4t/Eg+XLiPzFZoZwOtSrm4C4n3hz0tiRGzoHGQX1Ls/Hf9E8yG5rNLuNjEcrl5UwS XH3HoJYFw3v74At1OUNjA6AsVR8wpF28XtcrGO41ooknQIuBmnYvx+5E9iyTJL/Sor8v blt6CKxttpLX/QDJU5WGuNjKCm/VoH1DUjtQXdzRUKrWDBgr26VeBHnsRUtAxGHlYmx6 ojSNDU2Wc2gjzJHoSYRmftpknb9WqF74QGSH82RkmPjp2DbKLjFodiIIgRzGyYbSEoW8 peYg== X-Gm-Message-State: AC+VfDzhzSzJBRTyNwHZifuo62PZzb2unjOkoQObA6M7dJKevAcZ9zpY o+bcPIT5TcC8/xqUkrf/jw7bIg== X-Google-Smtp-Source: ACHHUZ732AgwtsdRIGVfJVXnf6XhTB+DhJ0rehKAr5NQth9BdYVMXDZVJ2UHoZ+T8IFVFMJyZmEM5Q== X-Received: by 2002:a05:6512:684:b0:4f9:b649:23d2 with SMTP id t4-20020a056512068400b004f9b64923d2mr2206194lfe.42.1687724749121; Sun, 25 Jun 2023 13:25:49 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id m21-20020a195215000000b004f8427f8716sm787537lfb.262.2023.06.25.13.25.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Jun 2023 13:25:48 -0700 (PDT) From: Dmitry Baryshkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Michael Turquette , "Rafael J. Wysocki" , Georgi Djakov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Christian Marangi , Stephan Gerhold Subject: [PATCH v2 00/26] ARM: qcom: apq8064: support CPU frequency scaling Date: Sun, 25 Jun 2023 23:25:21 +0300 Message-Id: <20230625202547.174647-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Implement CPUFreq support for one of the oldest supported Qualcomm platforms, APQ8064. Each core has independent power and frequency control. Additionally the L2 cache is scaled to follow the CPU frequencies (failure to do so results in strange semi-random crashes). Core voltage is controlled through the SAW2 devices, one for each core. The L2 has two regulators, vdd-mem and vdd-dig. Changes since v1: - Added separate Krait L2 cache device driver - Moved vdd-mem and vdd-dig scaling to the L2 cache device (Christian, Stephen Gerhold) - Fixed the 'INTERCONNECT' in the guarding define for krait-cc bindings (Stephen Boyd) - Made SAW2's regulator property -> node handling clear (Krzysztof) - Dropped the 'regulator' property from all SAW2 devices. Dmitry Baryshkov (26): dt-bindings: opp: opp-v2-kryo-cpu: support Qualcomm Krait SoCs dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml dt-bindings: soc: qcom: qcom,saw2: define optional regulator node dt-bindings: clock: qcom,krait-cc: Krait core clock controller dt-bindings: cache: describe L2 cache on Qualcomm Krait platforms interconnect: icc-clk: add support for scaling using OPP clk: qcom: krait-cc: rewrite driver to use clk_hw instead of clk soc: qcom: spm: add support for voltage regulator cpufreq: qcom-nvmem: create L2 cache device cpufreq: qcom-nvmem: also accept operating-points-v2-krait-cpu cpufreq: qcom-nvmem: drop pvs_ver for format a fuses cpufreq: qcom-nvmem: provide separate configuration data for apq8064 soc: qcom: Add driver for Qualcomm Krait L2 cache scaling ARM: dts: qcom: apq8064: rename SAW nodes to power-manager ARM: dts: qcom: apq8064: declare SAW2 regulators ARM: dts: qcom: apq8064: add L2 cache scaling ARM: dts: qcom: apq8064: add simple CPUFreq support ARM: dts: qcom: apq8064: provide voltage scaling tables ARM: dts: qcom: apq8064: enable passive CPU cooling ARM: dts: qcom: apq8064-asus-nexus7-flo: constraint cpufreq regulators ARM: dts: qcom: apq8064-ifc6410: constraint cpufreq regulators ARM: dts: qcom: msm8960: declare SAW2 regulators ARM: dts: qcom: apq8084: drop 'regulator' property from SAW2 device ARM: dts: qcom: msm8974: drop 'regulator' property from SAW2 device ARM: dts: qcom: ipq4019: drop 'regulator' property from SAW2 devices ARM: dts: qcom: ipq8064: drop 'regulator' property from SAW2 devices .../devicetree/bindings/arm/msm/qcom,saw2.txt | 58 -- .../bindings/cache/qcom,krait-l2-cache.yaml | 75 ++ .../bindings/opp/opp-v2-kryo-cpu.yaml | 12 +- .../qcom/{qcom,spm.yaml => qcom,saw2.yaml} | 39 +- .../dts/qcom/qcom-apq8064-asus-nexus7-flo.dts | 14 +- .../boot/dts/qcom/qcom-apq8064-ifc6410.dts | 18 +- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 671 +++++++++++++++++- arch/arm/boot/dts/qcom/qcom-apq8084.dtsi | 1 - arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 5 - arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 2 - arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 12 +- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 1 - drivers/clk/qcom/krait-cc.c | 141 ++-- drivers/cpufreq/qcom-cpufreq-nvmem.c | 76 +- drivers/interconnect/icc-clk.c | 13 +- drivers/soc/qcom/Kconfig | 9 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/krait-l2-cache.c | 190 +++++ drivers/soc/qcom/spm.c | 205 +++++- include/dt-bindings/clock/qcom,krait-cc.h | 17 + include/dt-bindings/soc/qcom,krait-l2-cache.h | 12 + include/linux/interconnect-clk.h | 1 + include/soc/qcom/spm.h | 9 + 23 files changed, 1403 insertions(+), 179 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt create mode 100644 Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml rename Documentation/devicetree/bindings/soc/qcom/{qcom,spm.yaml => qcom,saw2.yaml} (57%) create mode 100644 drivers/soc/qcom/krait-l2-cache.c create mode 100644 include/dt-bindings/clock/qcom,krait-cc.h create mode 100644 include/dt-bindings/soc/qcom,krait-l2-cache.h