From patchwork Tue Jul 11 09:35:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 13308345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 626E5C001DF for ; Tue, 11 Jul 2023 09:36:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230464AbjGKJg3 (ORCPT ); Tue, 11 Jul 2023 05:36:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230222AbjGKJg1 (ORCPT ); Tue, 11 Jul 2023 05:36:27 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A9FD122; Tue, 11 Jul 2023 02:36:26 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36B7bb7U015581; Tue, 11 Jul 2023 09:36:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=eGs/PKDWyy2RmcTUgiLNBtZ+2ubgY1BW+XQqiNtLqCs=; b=FJ3EdGsNEiQoMPfCVb2I4Z1iMKG68Bz8pHAdxc/6gjit0O5WVyLT2P2eUtX+3cQy1F8M 82wBKMMKMf2jS4RUyqEngaXV5O9i+Y4fytEgQNzqWn3fOlHQ/suck2CbjnehRClnSirN 9Abdm3dbrMrE1VX1auhoxKVFtWAiWEcXI8r882eQnFFV0GJgUE1TGz0CEV2LzUG20drX pXpIbCYDLVQf8ZlkDA/+fLwngxe1+FAzceTbV8FmMJRPRnE0IgKm8KMi8qtQ10IIv2kK TLDAh9A6aElpAHJwOcz0hQuA8EJINEQsJbFIQniyqcci/6SVSxp/o3lR84A2pBlJteat uw== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rs1mnrd4f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Jul 2023 09:36:00 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 36B9Zn12007442 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Jul 2023 09:35:49 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Tue, 11 Jul 2023 02:35:42 -0700 From: Devi Priya To: , , , , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH 0/6] Add NSS clock controller support for IPQ9574 Date: Tue, 11 Jul 2023 15:05:23 +0530 Message-ID: <20230711093529.18355-1-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: W1kfuCNvB29fWZlTE3BpYM55MxmIPxRs X-Proofpoint-GUID: W1kfuCNvB29fWZlTE3BpYM55MxmIPxRs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-11_04,2023-07-06_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxscore=0 bulkscore=0 mlxlogscore=782 malwarescore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307110085 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add bindings, driver and devicetree node for networking sub system clock controller on IPQ9574. Also add support for NSS Huayra type alpha PLL and mark few nssnoc clocks as critical which are required to be turned on for accessing nss port clocks. The NSS clock controller driver depends on the below patchset which adds support for multiple configurations for same frequency. https://lore.kernel.org/linux-arm-msm/20230531222654.25475-1-ansuelsmth@gmail.com/ Devi Priya (6): clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574 clk: qcom: gcc-ipq9574: Mark nssnoc clocks as critical dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions clk: qcom: Add NSS clock Controller driver for IPQ9574 arm64: dts: qcom: ipq9574: Add support for nsscc node arm64: defconfig: Build NSS Clock Controller driver for IPQ9574 .../bindings/clock/qcom,ipq9574-nsscc.yaml | 76 + arch/arm64/boot/dts/qcom/ipq9574.dtsi | 44 + arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/Kconfig | 6 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-alpha-pll.c | 12 + drivers/clk/qcom/clk-alpha-pll.h | 1 + drivers/clk/qcom/gcc-ipq9574.c | 6 +- drivers/clk/qcom/nsscc-ipq9574.c | 3080 +++++++++++++++++ .../dt-bindings/clock/qcom,ipq9574-nsscc.h | 152 + .../dt-bindings/reset/qcom,ipq9574-nsscc.h | 134 + 11 files changed, 3510 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml create mode 100644 drivers/clk/qcom/nsscc-ipq9574.c create mode 100644 include/dt-bindings/clock/qcom,ipq9574-nsscc.h create mode 100644 include/dt-bindings/reset/qcom,ipq9574-nsscc.h base-commit: fe57d0d86f03a8b2afe2869a95477d0ed1824c96