| Message ID | 20230731080043.38552-1-quic_tengfan@quicinc.com (mailing list archive) |
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From: Tengfei Fan <quic_tengfan@quicinc.com>
To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
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Subject: [PATCH v4 0/6] soc: qcom: Add support for SM4450
Date: Mon, 31 Jul 2023 16:00:37 +0800
Message-ID: <20230731080043.38552-1-quic_tengfan@quicinc.com>
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|
| Series |
soc: qcom: Add support for SM4450
|
expand
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On Mon, 31 Jul 2023 16:00:37 +0800, Tengfei Fan wrote: > This series adds CPU, SoC and board compatible support for SM4450. > > Applied, thanks! [2/6] dt-bindings: arm: qcom: Document SM4450 SoC and boards commit: 2b1fd18fe5f9382409d4c881d28bca9693f361a1 [3/6] arm64: dts: qcom: Adds base SM4450 DTSI commit: 7a1fd03e7410a8413e6140d967d66c624ddec690 [4/6] arm64: dts: qcom: Add base SM4450 QRD DTS commit: a5de9bc61181cd65df0170ba8c855b6be650c1e8 Best regards,
This series adds CPU, SoC and board compatible support for SM4450. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- v3 -> v4: - drop adjust IPQ5019 related sequence patches v2 -> v3: - remove some bootargs arguments from sm4450-qrd.dtsi - adjust IPQ5019 related sequence in bindings and socinfo file v1 -> v2: - use hypens replace of underscores in node name - add empty lines before child nodes - drop SCM node - document qcom,sm4450-pdc compatible - drop clock-frequecny - align vertically - add reg after conmpatible, then ranges follow - update core compatible to standard ARM core name - add dcc related parameters in bootargs node - keep patch code have reasonable sort - drop unnecessary copyright - separate bindings to a single patch previous discussion here: [1] v3: https://lore.kernel.org/linux-arm-msm/20230731061325.26431-1-quic_tengfan@quicinc.com/ [2] v2: https://lore.kernel.org/linux-arm-msm/20230727023508.18002-1-quic_tengfan@quicinc.com/ [3] v1: https://lore.kernel.org/linux-arm-msm/20230719100135.21325-1-quic_tengfan@quicinc.com/ Tengfei Fan (6): dt-bindings: qcom,pdc: add qcom,sm4450-pdc compatible dt-bindings: arm: qcom: Document SM4450 SoC and boards arm64: dts: qcom: Adds base SM4450 DTSI arm64: dts: qcom: Add base SM4450 QRD DTS dt-bindings: arm: qcom,ids: add SoC ID for SM4450 soc: qcom: socinfo: add SM4450 ID .../devicetree/bindings/arm/qcom.yaml | 6 + .../interrupt-controller/qcom,pdc.yaml | 1 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 + arch/arm64/boot/dts/qcom/sm4450.dtsi | 431 ++++++++++++++++++ drivers/soc/qcom/socinfo.c | 1 + include/dt-bindings/arm/qcom,ids.h | 1 + 7 files changed, 459 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts create mode 100644 arch/arm64/boot/dts/qcom/sm4450.dtsi base-commit: d7b3af5a77e8d8da28f435f313e069aea5bcf172