| Message ID | 20230919-spi-qup-dvfs-v2-0-1bac2e9ab8db@kernkonzept.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | spi: qup: Allow scaling power domains and interconnect | expand |
On Tue, 19 Sep 2023 13:59:47 +0200, Stephan Gerhold wrote: > Make it possible to scale performance states of the power domain and > interconnect of the SPI QUP controller in relation to the selected SPI > speed / core clock. This is done separately by: > > - Parsing the OPP table from the device tree for performance state > votes of the power domain > - Voting for the necessary bandwidth on the interconnect path to DRAM > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/4] spi: dt-bindings: qup: Document power-domains and OPP commit: e6419c35f0d92632e06708c5610a31957f1bd6b3 [2/4] spi: qup: Parse OPP table for DVFS support commit: 287fcdaa35fc666640f805310095c52f2d818d26 [3/4] spi: dt-bindings: qup: Document interconnects commit: d15befc0cef42db7712714157d9483cab81149a1 [4/4] spi: qup: Vote for interconnect bandwidth to DRAM commit: ecdaa9473019f94e0ad6974a5f69b9be7de137d3 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
Make it possible to scale performance states of the power domain and interconnect of the SPI QUP controller in relation to the selected SPI speed / core clock. This is done separately by: - Parsing the OPP table from the device tree for performance state votes of the power domain - Voting for the necessary bandwidth on the interconnect path to DRAM Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> --- Changes in v2: - Vote for bandwidth only when DMA is used and not with PIO - Add review tags from Krzysztof and Konrad - Link to v1: https://lore.kernel.org/r/20230912-spi-qup-dvfs-v1-0-3e38aa09c2bd@kernkonzept.com --- Stephan Gerhold (4): spi: dt-bindings: qup: Document power-domains and OPP spi: qup: Parse OPP table for DVFS support spi: dt-bindings: qup: Document interconnects spi: qup: Vote for interconnect bandwidth to DRAM .../devicetree/bindings/spi/qcom,spi-qup.yaml | 13 ++++++ drivers/spi/spi-qup.c | 50 +++++++++++++++++++++- 2 files changed, 62 insertions(+), 1 deletion(-) --- base-commit: baaa2957b0c6feb4ff7806b5d8e0039bd80acbdf change-id: 20230912-spi-qup-dvfs-71fc8a5e0cb1 Best regards,