From patchwork Fri Nov 17 09:27:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 13458573 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="GnbfWv5B" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 293BAB7; Fri, 17 Nov 2023 01:28:10 -0800 (PST) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AH7c2BU021895; Fri, 17 Nov 2023 09:28:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=BHCF9LnbimJFinOpOG3HG9Nb3gkW+d7+o8Jglj+Eehs=; b=GnbfWv5BThqVGttQZ9jb5f3NSH0Jq1FMAy7uNAo55tuqp5ji9+YBca6tjp29QHmYsEpe bl9Qog/WV4OkKK3eypa9he/oFxgCmRGwlDg5rRsG0dAXJY9/kgk/Qw3dj0BGF1K2gTYf U9lwzPl0RRlO8cYZVP0PFrgMgqe1DDlR6f3gpY3Q/CdBk6vtr4ehx9vbGNThjBjkHTUb lS11reGGq1xFyeNP/noZ1ANZo+/sENHTVeCqtXbWHOSAVKDoexvmeku7LtlS2YrXLd2Y MFIHyJaoC5DidtfJ8XqJth9Q22t+8eb7LQLfp604QRoVL6fE97wR6GI4IjSLd+5o+Eqq tw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3udmw429dy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 09:28:06 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AH9S5nL007799 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Nov 2023 09:28:05 GMT Received: from blr-ubuntu-87.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Fri, 17 Nov 2023 01:27:59 -0800 From: Sibi Sankar To: , , , , , CC: , , , , , , , , , , , Sibi Sankar Subject: [PATCH V2 0/4] clk: qcom: Introduce clocks drivers for X1E80100 Date: Fri, 17 Nov 2023 14:57:33 +0530 Message-ID: <20231117092737.28362-1-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: nfUvZy-4QDhZdOozExmRLyAEV0avd-7s X-Proofpoint-ORIG-GUID: nfUvZy-4QDhZdOozExmRLyAEV0avd-7s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-17_07,2023-11-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxlogscore=679 clxscore=1015 suspectscore=0 mlxscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311170069 This series adds initial clock support for the Qualcomm X1E80100 platform, aka Snapdragon X Elite. Our v1 post of the patchsets adding support for Snapdragon X Elite SoC had the part number sc8380xp which is now updated to the new part number x1e80100 based on the new branding scheme and refers to the exact same SoC. v2: * Update the part number from sc8380xp to x1e80100. * Use shared ops in the x1e80100 gcc driver [Bryan]. * Inline clock names [Konrad] * Fix Kconfig [Krzysztof] * Pick-up Rbs from the list. Dependencies: None Release Link: https://www.qualcomm.com/news/releases/2023/10/qualcomm-unleashes-snapdragon-x-elite--the-ai-super-charged-plat Rajendra Nayak (4): dt-bindings: clock: qcom: Add X1E80100 GCC clocks clk: qcom: Add Global Clock controller (GCC) driver for X1E80100 dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100 clk: qcom: rpmh: Add support for X1E80100 rpmh clocks .../bindings/clock/qcom,rpmhcc.yaml | 1 + .../bindings/clock/qcom,x1e80100-gcc.yaml | 72 + drivers/clk/qcom/Kconfig | 10 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 26 + drivers/clk/qcom/gcc-x1e80100.c | 6807 +++++++++++++++++ include/dt-bindings/clock/qcom,x1e80100-gcc.h | 485 ++ 7 files changed, 7402 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml create mode 100644 drivers/clk/qcom/gcc-x1e80100.c create mode 100644 include/dt-bindings/clock/qcom,x1e80100-gcc.h