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[v2,00/21] Add PCIe bridge node in DT for Qcom SoCs

Message ID 20240321-pcie-qcom-bridge-dts-v2-0-1eb790c53e43@linaro.org (mailing list archive)
Headers show
Series Add PCIe bridge node in DT for Qcom SoCs | expand

Message

Manivannan Sadhasivam March 21, 2024, 11:16 a.m. UTC
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, this series adds a DT node for the
PCIe bridges across all SoCs.

There is no functionality change with this series, but the PCIe bridge
representation in DT will be necessary to add the DT node for the client
devices like the one proposed in power sequencing series [1].

- Mani

[1] https://lore.kernel.org/linux-arm-msm/20240216203215.40870-8-brgl@bgdev.pl/

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v2:
- Added label for bridges in sc8280xp
- Collected reviews
- Link to v1: https://lore.kernel.org/r/20240221-pcie-qcom-bridge-dts-v1-0-6c6df0f9450d@linaro.org

---
Manivannan Sadhasivam (21):
      arm64: dts: qcom: sm8250: Add PCIe bridge node
      arm64: dts: qcom: sdm845: Add PCIe bridge node
      arm64: dts: qcom: sm8150: Add PCIe bridge node
      arm64: dts: qcom: sm8350: Add PCIe bridge node
      arm64: dts: qcom: sm8450: Add PCIe bridge node
      arm64: dts: qcom: sm8550: Add PCIe bridge node
      arm64: dts: qcom: sm8650: Add PCIe bridge node
      arm64: dts: qcom: sa8775p: Add PCIe bridge node
      arm64: dts: qcom: sc8280xp: Add PCIe bridge node
      arm64: dts: qcom: msm8998: Add PCIe bridge node
      arm64: dts: qcom: sc7280: Add PCIe bridge node
      arm64: dts: qcom: qcs404: Add PCIe bridge node
      arm64: dts: qcom: sc8180x: Add PCIe bridge node
      arm64: dts: qcom: msm8996: Add PCIe bridge node
      arm64: dts: qcom: ipq8074: Add PCIe bridge node
      arm64: dts: qcom: ipq6018: Add PCIe bridge node
      ARM: dts: qcom: ipq8064: Add PCIe bridge node
      ARM: dts: qcom: ipq4019: Add PCIe bridge node
      ARM: dts: qcom: apq8064: Add PCIe bridge node
      ARM: dts: qcom: sdx55: Add PCIe bridge node
      arm64: dts: qcom: sm8650: Use "pcie" as the node name instead of "pci"

 arch/arm/boot/dts/qcom/qcom-apq8064.dtsi           | 10 +++++
 arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi           | 10 +++++
 arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi           | 30 +++++++++++++
 arch/arm/boot/dts/qcom/qcom-sdx55.dtsi             | 10 +++++
 arch/arm64/boot/dts/qcom/ipq6018.dtsi              | 10 +++++
 arch/arm64/boot/dts/qcom/ipq8074.dtsi              | 20 +++++++++
 arch/arm64/boot/dts/qcom/msm8996.dtsi              | 30 +++++++++++++
 arch/arm64/boot/dts/qcom/msm8998.dtsi              | 10 +++++
 arch/arm64/boot/dts/qcom/qcs404.dtsi               | 10 +++++
 arch/arm64/boot/dts/qcom/sa8775p.dtsi              | 20 +++++++++
 arch/arm64/boot/dts/qcom/sc7280.dtsi               | 10 +++++
 arch/arm64/boot/dts/qcom/sc8180x.dtsi              | 40 +++++++++++++++++
 .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts     | 20 +++------
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi             | 50 ++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sdm845.dtsi               | 20 +++++++++
 arch/arm64/boot/dts/qcom/sm8150.dtsi               | 20 +++++++++
 arch/arm64/boot/dts/qcom/sm8250.dtsi               | 30 +++++++++++++
 arch/arm64/boot/dts/qcom/sm8350.dtsi               | 20 +++++++++
 arch/arm64/boot/dts/qcom/sm8450.dtsi               | 20 +++++++++
 arch/arm64/boot/dts/qcom/sm8550.dtsi               | 20 +++++++++
 arch/arm64/boot/dts/qcom/sm8650.dtsi               | 24 ++++++++++-
 21 files changed, 418 insertions(+), 16 deletions(-)
---
base-commit: 10569bb9fb9732cec670faa38cf1460cabeffa09
change-id: 20240221-pcie-qcom-bridge-dts-b83c0d1b642b

Best regards,

Comments

Konrad Dybcio March 23, 2024, 12:11 a.m. UTC | #1
On 21.03.2024 12:16, Manivannan Sadhasivam wrote:
> On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
> for each controller instance. Hence, this series adds a DT node for the
> PCIe bridges across all SoCs.
> 
> There is no functionality change with this series, but the PCIe bridge
> representation in DT will be necessary to add the DT node for the client
> devices like the one proposed in power sequencing series [1].
> 
> - Mani
> 
> [1] https://lore.kernel.org/linux-arm-msm/20240216203215.40870-8-brgl@bgdev.pl/
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---

Everything looks good

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Bjorn Andersson April 21, 2024, 10:29 p.m. UTC | #2
On Thu, 21 Mar 2024 16:46:20 +0530, Manivannan Sadhasivam wrote:
> On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
> for each controller instance. Hence, this series adds a DT node for the
> PCIe bridges across all SoCs.
> 
> There is no functionality change with this series, but the PCIe bridge
> representation in DT will be necessary to add the DT node for the client
> devices like the one proposed in power sequencing series [1].
> 
> [...]

Applied, thanks!

[17/21] ARM: dts: qcom: ipq8064: Add PCIe bridge node
        commit: 0c4d19b125401957123989a25094972cf0e77670
[18/21] ARM: dts: qcom: ipq4019: Add PCIe bridge node
        commit: ed9b196418d4e2fa4f6c27b61a92c2038e1ba04d
[19/21] ARM: dts: qcom: apq8064: Add PCIe bridge node
        commit: 27cb9eccf94cb163f9bf3b945f249ab7c42861db
[20/21] ARM: dts: qcom: sdx55: Add PCIe bridge node
        commit: 669841a2eff4c0132841dea3ae40d9148a36f257

Best regards,
Bjorn Andersson May 27, 2024, 3 a.m. UTC | #3
On Thu, 21 Mar 2024 16:46:20 +0530, Manivannan Sadhasivam wrote:
> On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
> for each controller instance. Hence, this series adds a DT node for the
> PCIe bridges across all SoCs.
> 
> There is no functionality change with this series, but the PCIe bridge
> representation in DT will be necessary to add the DT node for the client
> devices like the one proposed in power sequencing series [1].
> 
> [...]

Applied, thanks!

[21/21] arm64: dts: qcom: sm8650: Use "pcie" as the node name instead of "pci"
        commit: 2f2120a15251097f9afcab5b4db7894ce03b2933

Best regards,