| Message ID | 20240527-msm-drm-dsc-dsi-video-upstream-4-v5-0-f797ffba4682@linaro.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add DSC support to DSI video panel | expand |
On 27/05/2024 16:21, Jun Nie wrote: > This is follow up update to Jonathan's patch set. > > Changes vs V4: > - Polish width calculation with helper function > - Split cfg2 compression bit into another patch > > Changes vs V3: > - Rebase to latest msm-next-lumag branch. > - Drop the slice_per_pkt change as it does impact basic DSC feature. > - Remove change in generated dsi header > - update DSC compressed width calculation with bpp and bpc > - split wide bus impact on width into another patch > - rename patch tile of VIDEO_COMPRESSION_MODE_CTRL_WC change > - Polish warning usage > - Add tags from reviewers > > Changes vs V2: > - Drop the INTF_CFG2_DATA_HCTL_EN change as it is handled in > latest mainline code. > - Drop the bonded DSI patch as I do not have device to test it. > - Address comments from version 2. > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > --- > Changes in v5: > - Link to v4: https://lore.kernel.org/r/20240524-msm-drm-dsc-dsi-video-upstream-4-v4-0-e61c05b403df@linaro.org > > --- > Jonathan Marek (4): > drm/msm/dpu: fix video mode DSC for DSI > drm/msm/dsi: set video mode widebus enable bit when widebus is enabled > drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC > drm/msm/dsi: add a comment to explain pkt_per_line encoding > > Jun Nie (2): > drm/msm/dpu: adjust data width for widen bus case > drm/msm/dpu: enable compression bit in cfg2 for DSC > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 8 ++++++++ > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 18 ++++++++++++++++++ > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 13 +++++++++++++ > drivers/gpu/drm/msm/dsi/dsi_host.c | 10 +++++++++- > 5 files changed, 49 insertions(+), 2 deletions(-) > --- > base-commit: e6428bcb611f6c164856a41fc5a1ae8471a9b5a9 > change-id: 20240524-msm-drm-dsc-dsi-video-upstream-4-22e2266fbe89 > > Best regards, Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK with https://lore.kernel.org/all/20230728012623.22991-1-quic_parellan@quicinc.com/ and enforce-video-mode in panel node. Thanks, Neil
This is follow up update to Jonathan's patch set. Changes vs V4: - Polish width calculation with helper function - Split cfg2 compression bit into another patch Changes vs V3: - Rebase to latest msm-next-lumag branch. - Drop the slice_per_pkt change as it does impact basic DSC feature. - Remove change in generated dsi header - update DSC compressed width calculation with bpp and bpc - split wide bus impact on width into another patch - rename patch tile of VIDEO_COMPRESSION_MODE_CTRL_WC change - Polish warning usage - Add tags from reviewers Changes vs V2: - Drop the INTF_CFG2_DATA_HCTL_EN change as it is handled in latest mainline code. - Drop the bonded DSI patch as I do not have device to test it. - Address comments from version 2. Signed-off-by: Jun Nie <jun.nie@linaro.org> --- Changes in v5: - Link to v4: https://lore.kernel.org/r/20240524-msm-drm-dsc-dsi-video-upstream-4-v4-0-e61c05b403df@linaro.org --- Jonathan Marek (4): drm/msm/dpu: fix video mode DSC for DSI drm/msm/dsi: set video mode widebus enable bit when widebus is enabled drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC drm/msm/dsi: add a comment to explain pkt_per_line encoding Jun Nie (2): drm/msm/dpu: adjust data width for widen bus case drm/msm/dpu: enable compression bit in cfg2 for DSC drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 8 ++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 18 ++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 13 +++++++++++++ drivers/gpu/drm/msm/dsi/dsi_host.c | 10 +++++++++- 5 files changed, 49 insertions(+), 2 deletions(-) --- base-commit: e6428bcb611f6c164856a41fc5a1ae8471a9b5a9 change-id: 20240524-msm-drm-dsc-dsi-video-upstream-4-22e2266fbe89 Best regards,