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Fri, 31 May 2024 06:52:39 -0700 (PDT) Received: from [127.0.1.1] ([110.93.11.116]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4212b85ec87sm26762735e9.27.2024.05.31.06.52.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 06:52:38 -0700 (PDT) From: Krzysztof Kozlowski Subject: [PATCH 00/16] dt-bindings: clock: qcom: reference qcom-gcc.yaml Date: Fri, 31 May 2024 15:52:18 +0200 Message-Id: <20240531-dt-bindings-qcom-gcc-v1-0-b37d49fe1421@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIABLWWWYC/x3MQQ5AMBBA0avIrE0ySiVcRSxoR81C0YpIpHfXW L7F/y9EDsIR+uKFwLdE2X1GVRZg1sk7RrHZoEg1pOsK7YWzeCveRTzNvqEzBll1Wi+2JaIGcno EXuT5t8OY0geT6nIyZgAAAA== To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio , Jonathan Marek , Del Regno , Loic Poulain , Dmitry Baryshkov , Neil Armstrong , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Hi, Unify Qualcomm clock controllers by referencing qcom,gcc.yaml where applicable. Several existing bindings for these display/GPU/CAM clock controllers already do it. No external dependencies, this CAN be applied independently, but require power-domain-cells in each binding, just like Dmitry's new set is doing. https://lore.kernel.org/all/20240529-qcom-gdscs-v2-0-69c63d0ae1e7@linaro.org/ Best regards, Krzysztof Reviewed-by: Dmitry Baryshkov Reviewed-by: Rob Herring (Arm) --- Krzysztof Kozlowski (16): dt-bindings: clock: qcom,sm8450-videocc: reference qcom,gcc.yaml dt-bindings: clock: qcom,videocc: reference qcom,gcc.yaml dt-bindings: clock: qcom,dispcc-sc8280xp: reference qcom,gcc.yaml dt-bindings: clock: qcom,dispcc-sm6350: reference qcom,gcc.yaml dt-bindings: clock: qcom,dispcc-sm8x50: reference qcom,gcc.yaml dt-bindings: clock: qcom,gpucc-sdm660: reference qcom,gcc.yaml dt-bindings: clock: qcom,gpucc: reference qcom,gcc.yaml dt-bindings: clock: qcom,msm8998-gpucc: reference qcom,gcc.yaml dt-bindings: clock: qcom,qcm2290-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sc7180-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sc7280-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sdm845-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sm6115-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sm8450-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sm8550-dispcc: reference qcom,gcc.yaml dt-bindings: clock: qcom,sm8450-gpucc: reference qcom,gcc.yaml .../bindings/clock/qcom,dispcc-sc8280xp.yaml | 20 ++++---------------- .../bindings/clock/qcom,dispcc-sm6350.yaml | 20 ++++---------------- .../bindings/clock/qcom,dispcc-sm8x50.yaml | 18 ++---------------- .../devicetree/bindings/clock/qcom,gpucc-sdm660.yaml | 20 ++++---------------- .../devicetree/bindings/clock/qcom,gpucc.yaml | 20 ++++---------------- .../bindings/clock/qcom,msm8998-gpucc.yaml | 20 ++++---------------- .../bindings/clock/qcom,qcm2290-dispcc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sc7180-dispcc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sc7280-dispcc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sdm845-dispcc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sm6115-dispcc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sm8450-dispcc.yaml | 20 ++++---------------- .../devicetree/bindings/clock/qcom,sm8450-gpucc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sm8450-videocc.yaml | 20 ++++---------------- .../bindings/clock/qcom,sm8550-dispcc.yaml | 20 ++++---------------- .../devicetree/bindings/clock/qcom,videocc.yaml | 19 +++---------------- 16 files changed, 61 insertions(+), 256 deletions(-) --- base-commit: b0afb900b7d235d879f8e8e4babfe77d9db76f2f change-id: 20240531-dt-bindings-qcom-gcc-e2955fd60004 Best regards,