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b=H4sIAG+CF2cC/23NwQqDMAyA4VeRnteR1Kp1p73H2KG0UQvDunYUh /juq8JgA2/5A/mysEjBUWSXYmGBkovOjznKU8HMoMeeuLO5mQAhEaDhM5KCPPGnmXi0g+FYmQZ rq20ra5bvpkCdm3fzds89uPjy4b2/SLhtv5o60BJy4LajTppWaCrx+nCjDv7sQ882LokfAuURI TKhakUNaCUqgj9iXdcPot7dx/YAAAA= X-Change-ID: 20241007-x1e80100-qcp-sdhc-15c716dad946 To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Johan Hovold , Dmitry Baryshkov , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; a=openpgp-sha256; l=1594; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=7g7vQ5yuKO/HSCfrYWlV8Si3LPKtIuub+pj7PRO8uSE=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBnF4J1i0qmBmvrG1iJVbTDyDMZ1/SA5/1XP1Mt7 C/A5DcDHIeJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZxeCdQAKCRAbX0TJAJUV VuOOD/9PPJgG8sKRS74RVrlkrUmpPGm6aQU8gprzYfkYD0aBMiR+O33MmxZAI2OE0mXmIO+X+8l Rj3UpejB4hRCRPm9oIW6YbC6dLFN5u81iD6Au1R1lMwz69Z11u/vxQ7M6dYsU0Hc271D77iav49 1i/wT6DR8Zv1HMBQAY1L7J1t5K6UErW22+MX6l62Llg7qxQKYNEyg4wV6/ckc64GiD4CQdXjBGY IacuXidIkC8nUOrdVCDePN2lJ+udfuHQ3DImo9CGwgG7j6f/5eaLN6K+hQ4jgWwwYDwKY26uGve iTCtWEMgu0NUpOFItPeD07A8dY30jT4UzwijQ8Sadls/5Gw2bl2bcJDgIVPkixKKXoA1QfNkffV 0DOlhJReLP5NMk9U0lgCYyiFZ+EEvA2kmNKhffuyHBgpmWxSJHpVKiCIAYkzvC2XYk1uvUW+o7c kbw+vdKFDC3TuvjXTrVkE2WAxYDOcuLaO0NqF6yZjDIi8HCeGFpjhHtYPUIhnSW3+caS/uG4dpd 24BssnnYETWycP4scLLfi+UVFmMzMEijRsaVfjcDH2F1KuZlyyZT68JP8Ngt/uEixZTDCBbsxc/ pJN/RJ/TnNW2KeV45cXTkv6r5xnitPhrTGaeO7pn0spXPFXJ9Xi1oFrQcjs+GyfwyI4bXVPOteJ QHDvPLfwc3lIBxg== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE The X1E80100 has two SDHC controllers (called SDC2 and SDC4). Describe both of them and enable the SDC2 on QCP. This brings SD card support for the microSD port on QCP. The SDC4 is described but there is no device outthere yet that makes use of it, AFAIK. Didn't include the SDC4 pins yet because there are some bindings errors that need to be addressed, and since there is no HW that actually uses it, we can describe them at a later stage. Signed-off-by: Abel Vesa --- Changes in v3: - Reordered the default and sleep pinconfs. Also the bias and drive-strength properties. As per Konrad's suggestion. - Link to v2: https://lore.kernel.org/r/20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org Changes in v2: - rebased on next-20241011 - dropped the bindings schema update patch - dropped the sdhci-caps-mask properties from both controllers as SDR104/SDR50 are actually supported - Link to v1: https://lore.kernel.org/r/20241008-x1e80100-qcp-sdhc-v1-0-dfef4c92ae31@linaro.org --- Abel Vesa (3): arm64: dts: qcom: x1e80100: Describe the SDHC controllers arm64: dts: qcom: x1e80100: Describe TLMM pins for SDC2 arm64: dts: qcom: x1e80100-qcp: Enable SD card support arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 20 +++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 142 ++++++++++++++++++++++++++++++ 2 files changed, 162 insertions(+) --- base-commit: d61a00525464bfc5fe92c6ad713350988e492b88 change-id: 20241007-x1e80100-qcp-sdhc-15c716dad946 Best regards,