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[2001:14ba:a0c3:3a00:70b:e6fc:b322:6a1b]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e10a915sm209542e87.12.2024.10.25.08.03.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 08:03:52 -0700 (PDT) From: Dmitry Baryshkov Subject: [PATCH v3 00/11] clk: qcom: add support for clock controllers on the SAR2130P platform Date: Fri, 25 Oct 2024 18:03:34 +0300 Message-Id: <20241025-sar2130p-clocks-v3-0-48f1842fd156@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAEazG2cC/3XNQQ6CMBCF4auQrq3pTCGgK+9hXBQ6hUZCydQ0G sLdLaw0xuX/kvlmEZHYUxTnYhFMyUcfphz6UIhuMFNP0tvcAhWWoKCW0TCCVrPsxtDdo6xca+2 pdaokEvlqZnL+uYvXW+7Bx0fg1/4gwbb+txJIJV1dUV0qp0xjL6OfDIdj4F5sWMIPAOEXwAzoR lNFLaA2+AWs6/oGaOzjgfAAAAA= X-Change-ID: 20241017-sar2130p-clocks-5fbdd9bf04ee To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Neil Armstrong , Philipp Zabel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Konrad Dybcio , Kalpak Kawadkar , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3257; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=2I/TB9e/qvZscYuIM5ZhAGgZHV87H1IH0MC1lBIDRwk=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBnG7NROmc0Tq8cKYJkTawSQHz7Cbdd8N9iUrLXh uGv8U4rhFaJAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZxuzUQAKCRAU23LtvoBl uL9AEAC7fv5yrRXvi55cS54GRqGAsE3aTSY3cikJ5AqZHku7O6pkUDx2CizI70JANmhdi4QAUJS dox5p7vsy3q0Je2iS87Rd5xPcdT2sjC+NZ2yD2I3X22/QLNUyqXId/xHPZormvjgRpUfQKBao2z 7HFhc8y9/Xy3YCWHwPWWKV0S8xONPHHxapl6FabSeSWy1wymL4QVuvZxbovFwVHnZ3tB2L6toka gdfSi6aEmAZgPh/CyhxlGRFFMPQmHAgPDV9AjQXjPZvpOVkpKwNiTFwtl3Fzb0MOwxvSKaUynAj MRNUXRsfUi0xFcot/3MmbPJG/MJTu5jH/BddW9UlIbsNmUehANJNyrgiM3zzKNDFCnNXrPsXRX4 S6SeA7mbga/rCkV6gqqqgaiQ6sf3+jzVjeSfQF5Wxl11sDaz+Pv4hlmCLLFZpd0fU4iKlVQGduW r+dKkrsoQFwjnPpSBOUbhuenAGiromI5X5I+hmmy1Du6cHe8C2zD9IvaN1qfOBDfrbUXKzXp5s7 eP0xzLl5PTarxQcIn4zzXYmQMmhx/poQragNU3n1t2czMEFLuzmvzvPTGIpPt/LG5h4pUadkusk p6qTFegnrQRXNdpL8nZ45IoaPwHzbmev2GCg+2WajQ0XV2YulptW850NEnks50KDou0oaWwAu5z +UxXvzO6iSG3JNA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Add support for the RPMh, TCSR, Global, Display and GPU clock controllers as present on the Qualcomm SAR2130P platform. Signed-off-by: Dmitry Baryshkov --- Changes in v3: - Added rfclka1 to RPMh clocks for SAR2140P (Taniya) - Added HLOS1_VOTE_MM_SNOC_MMU_TBU_HF0_GDSC, HLOS1_VOTE_MM_SNOC_MMU_TBU_SF0_GDSC, HLOS1_VOTE_TURING_MMU_TBU0_GDSC, HLOS1_VOTE_TURING_MMU_TBU1_GDSC (Taniya) - Removed extra debug print in gpucc probe (Konrad) - Link to v2: https://lore.kernel.org/r/20241021-sar2130p-clocks-v2-0-383e5eb123a2@linaro.org Changes in v2: - Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk, gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk, gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg, gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding subsytems bringup (Taniya) - Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya) - Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches (Taniya) - Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5, gcc_parent_map_5 (LKP) - Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org --- Dmitry Baryshkov (9): dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible dt-bindings: clock: qcom: document SAR2130P Global Clock Controller dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible dt-bindings: clock: qcom,sm8550-dispcc: Add SAR2130P compatible clk: qcom: rcg2: add clk_rcg2_shared_floor_ops clk: qcom: rpmh: add support for SAR2130P clk: qcom: add support for GCC on SAR2130P clk: qcom: tcsrcc-sm8550: add SAR2130P support clk: qcom: dispcc-sm8550: enable support for SAR2130P Konrad Dybcio (2): dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles clk: qcom: add SAR2130P GPU Clock Controller support .../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + .../bindings/clock/qcom,sar2130p-gcc.yaml | 65 + .../bindings/clock/qcom,sm8450-gpucc.yaml | 2 + .../bindings/clock/qcom,sm8550-dispcc.yaml | 1 + .../bindings/clock/qcom,sm8550-tcsr.yaml | 1 + drivers/clk/qcom/Kconfig | 22 +- drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 48 +- drivers/clk/qcom/clk-rpmh.c | 13 + drivers/clk/qcom/dispcc-sm8550.c | 18 +- drivers/clk/qcom/gcc-sar2130p.c | 2366 ++++++++++++++++++++ drivers/clk/qcom/gpucc-sar2130p.c | 503 +++++ drivers/clk/qcom/tcsrcc-sm8550.c | 18 +- include/dt-bindings/clock/qcom,sar2130p-gcc.h | 185 ++ include/dt-bindings/clock/qcom,sar2130p-gpucc.h | 33 + include/dt-bindings/reset/qcom,sar2130p-gpucc.h | 14 + 17 files changed, 3282 insertions(+), 11 deletions(-) --- base-commit: f6202e7cb4762be30b01ca4e1666512171c16d2a change-id: 20241017-sar2130p-clocks-5fbdd9bf04ee Best regards,