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Fri, 15 Nov 2024 22:51:57 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AFMpuZg020253; Fri, 15 Nov 2024 22:51:57 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 4AFMpuoG020246 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 15 Nov 2024 22:51:56 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id CF6625A1; Sat, 16 Nov 2024 04:21:55 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, Wasim Nazir Subject: [PATCH v2 0/5] arm64: qcom: Add support for QCS9075 boards Date: Sat, 16 Nov 2024 04:21:47 +0530 Message-ID: <20241115225152.3264396-1-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.47.0 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: J_ZTtfXJcjOHyX0TVXKM5pAYBYPBoBgW X-Proofpoint-ORIG-GUID: J_ZTtfXJcjOHyX0TVXKM5pAYBYPBoBgW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411150192 This series: Add support for Qualcomm's rb8, ride/ride-r3 boards using QCS9075 SoC. QCS9075 is compatible IoT-industrial grade variant of SA8775p SoC without safety monitorng feature of SAfetyIsLand subsystem. This subsystem continues to supports other features like built-in self-test, error-detection, reset-handling, etc. Changelog: v2: - Remove unused dp nodes & update commit for ride vs ride-r3. v1: https://lore.kernel.org/all/20241110145339.3635437-1-quic_wasimn@quicinc.com/ Wasim Nazir (5): dt-bindings: arm: qcom,ids: add SoC ID for QCS9075 soc: qcom: socinfo: add QCS9075 SoC ID dt-bindings: arm: qcom: Document rb8/ride/ride-r3 on QCS9075 arm64: dts: qcom: Add support for QCS9075 RB8 arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3 .../devicetree/bindings/arm/qcom.yaml | 9 + arch/arm64/boot/dts/qcom/Makefile | 3 + arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 281 ++++++++++++++++++ arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 12 + arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 12 + drivers/soc/qcom/socinfo.c | 1 + include/dt-bindings/arm/qcom,ids.h | 1 + 7 files changed, 319 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-rb8.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts base-commit: 929beafbe7acce3267c06115e13e03ff6e50548a --- 2.47.0