From patchwork Tue Nov 19 02:20:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Xin Liu X-Patchwork-Id: 13879369 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 015AD7DA84; Tue, 19 Nov 2024 02:21:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731982912; cv=none; b=Jw9+Cavbm1p77y6x+3In4NGpjOIcoCYEL6/7KJE95SB352Oki88Mgo7LjKzz7h055IsMDKF0cPtJj9q2yu3LqlZvkowEWFy4LlZd5N49SqH3sPSODbtcXUSS/lRpv8TZTASqpnX0Polr0MdRPs2ZhA2RvH3co81nYmXeJqcIP8I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731982912; c=relaxed/simple; bh=7SL43tch81e4oDvOZQhg43YW2yt8frGpglvbtPYs8Q0=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Zn8334lHeelgmslDCY+GjWdqqAm0oXOJl5j4d4+CFHfR2MUMGL/30vf2VZw0dLwHKOgtMWNHMn+XH3WTdaKJGHqapgLI/i6NwtJyFI4OS05JZwq8etSMWPZO1BrfMB73xqQIFsis0FlWJ1GEX3ibdIzA5MsvLIIb7lPWfV+/zuM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=YO1OnWT2; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="YO1OnWT2" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AIGGhRK028554; Tue, 19 Nov 2024 02:21:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=SeaC2NyM77Sf41ZMIHFVuN BuRtQtRhVsb2GmS2eavso=; b=YO1OnWT2aoS33lu+a5eLLdUafow8A4XZsAhLRL D7GTnxlcGcZ6qosG2wf6cGp3w/hmNkU6+CR83WmG2lAS2cUuxx6gahm5X8k/oO/1 /5Gl8653Wb6re93ZxjSOverCWN49hpSxxL/cpIW3zES1Xqk78xpX60UFvJTvyhST eCrY8nwI63y+ANzVemz6VCzEsaGlZw6Mjg/RmFv29gp573Lu1N13+G3dvoKRpdOv vrPaTCZf8Sn6v+sOr8JO5h4QCHJ8Z5cJnqO1Xl01aUpRbzNVkUFOxzNigsxT5SRL ua60WW6Dc1qTx4waMDoUe1TcEqX8nRfrKtEx4IQOOWtY5y1w== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4308y814x6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 02:21:28 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AJ2LRD1020828 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Nov 2024 02:21:27 GMT Received: from liuxin-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 18 Nov 2024 18:21:21 -0800 From: Xin Liu To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio CC: Vinod Koul , Kishon Vijay Abraham I , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross , , , , , , , , , Subject: [PATCH v2 0/3] Enable UFS on QCS615 Date: Tue, 19 Nov 2024 10:20:47 +0800 Message-ID: <20241119022050.2995511-1-quic_liuxin@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: GXPaPUiJ3RWVHI6XKpolS0l-NernmBHQ X-Proofpoint-GUID: GXPaPUiJ3RWVHI6XKpolS0l-NernmBHQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 mlxscore=0 spamscore=0 adultscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411190019 From: Sayali Lokhande Add UFS support to the QCS615 Ride platform. The UFS host controller and QMP UFS PHY hardware of QCS615 are derived from SM6115. Include the relevant binding documents accordingly. Additionally, configure UFS-related clock, power, and interconnect settings in the device tree. This patch series depends on below patch series: https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@quicinc.com/ https://lore.kernel.org/all/20241011063112.19087-1-quic_qqzhou@quicinc.com/ Signed-off-by: Xin Liu --- Changes in v2: - PATCH 1/3: Reviewed-by: Krzysztof Kozlowski Acked-by: Manivannan Sadhasivam - PATCH 2/3：Use an OPP table instead of freq-table-hz.And modify some formatting issues. - PATCH 3/3：Reviewed-by: Konrad Dybcio - Link to v1: https://lore.kernel.org/all/20241017042300.872963-1-quic_liuxin@quicinc.com/ --- Xin Liu (3): dt-bindings: ufs: qcom: Add UFS Host Controller for QCS615 arm64: dts: qcom: qcs615: add UFS node arm64: dts: qcom: qcs615-ride: Enable UFS node .../devicetree/bindings/ufs/qcom,ufs.yaml | 2 + arch/arm64/boot/dts/qcom/qcs615-ride.dts | 16 +++ arch/arm64/boot/dts/qcom/qcs615.dtsi | 112 ++++++++++++++++++ 3 files changed, 130 insertions(+) --- base-commit: 0abcfdffcf872e4ef00e329b2013fb338acf3a57