Message ID | 20241122132044.30024-1-quic_yrangana@quicinc.com (mailing list archive) |
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Miller" <davem@davemloft.net>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konradybcio@kernel.org> CC: <linux-arm-msm@vger.kernel.org>, <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <quic_yrangana@quicinc.com> Subject: [PATCH V2 0/2] Enable Inline crypto engine for QCS8300 Date: Fri, 22 Nov 2024 18:50:42 +0530 Message-ID: <20241122132044.30024-1-quic_yrangana@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pkEXk4YRoGgSfqBxRw9ySUwikLQTyPfb X-Proofpoint-ORIG-GUID: pkEXk4YRoGgSfqBxRw9ySUwikLQTyPfb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 mlxlogscore=700 priorityscore=1501 phishscore=0 suspectscore=0 mlxscore=0 spamscore=0 clxscore=1015 adultscore=0 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220111 |
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Enable Inline crypto engine for QCS8300
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Document and add device-tree node to enable Inline crypto engine for QCS8300 This series depends on below patch series: https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@quicinc.com/ - Reviewed Changes in v2: - extend UFS ICE to the full register range - Link to v1: https://lore.kernel.org/all/20241113043351.2889027-1-quic_yrangana@quicinc.com/ Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> --- Yuvaraj Ranganathan (2): dt-bindings: crypto: ice: document the qcs8300 inline crypto engine arm64: dts: qcom: qcs8300: enable the inline crypto engine .../bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + arch/arm64/boot/dts/qcom/qcs8300.dtsi | 8 ++++++++ 2 files changed, 9 insertions(+)