From patchwork Tue Aug 20 09:56:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ivan T. Ivanov" X-Patchwork-Id: 2846992 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 491149F2F4 for ; Tue, 20 Aug 2013 09:58:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 900742049B for ; Tue, 20 Aug 2013 09:58:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A4F442047E for ; Tue, 20 Aug 2013 09:58:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751004Ab3HTJ5Z (ORCPT ); Tue, 20 Aug 2013 05:57:25 -0400 Received: from ns.mm-sol.com ([212.124.72.66]:56815 "EHLO extserv.mm-sol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750875Ab3HTJ5X (ORCPT ); Tue, 20 Aug 2013 05:57:23 -0400 Received: from iivanov-dev.int.mm-sol.com (unknown [172.18.0.3]) by extserv.mm-sol.com (Postfix) with ESMTPSA id A5397C6A2; Tue, 20 Aug 2013 12:57:21 +0300 (EEST) From: "Ivan T. Ivanov" To: balbi@ti.com Cc: rob.herring@calxeda.com, pawel.moll@arm.com, mark.rutland@arm.com, swarren@wwwdotorg.org, ian.campbell@citrix.com, rob@landley.net, gregkh@linuxfoundation.org, grant.likely@linaro.org, idos@codeaurora.org, mgautam@codeaurora.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-msm@vger.kernel.org, "Ivan T. Ivanov" Subject: [PATCH v4 1/3] usb: dwc3: msm: Add device tree binding information Date: Tue, 20 Aug 2013 12:56:03 +0300 Message-Id: <1376992565-22292-2-git-send-email-iivanov@mm-sol.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1376992565-22292-1-git-send-email-iivanov@mm-sol.com> References: <1376992565-22292-1-git-send-email-iivanov@mm-sol.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "Ivan T. Ivanov" MSM USB3.0 core wrapper consist of USB3.0 IP from Synopsys (SNPS) and HS, SS PHY's control and configuration registers. It could operate in device mode (SS, HS, FS) and host mode (SS, HS, FS, LS). Signed-off-by: Ivan T. Ivanov --- .../devicetree/bindings/usb/msm-ssusb.txt | 104 ++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/msm-ssusb.txt diff --git a/Documentation/devicetree/bindings/usb/msm-ssusb.txt b/Documentation/devicetree/bindings/usb/msm-ssusb.txt new file mode 100644 index 0000000..cacbd3b --- /dev/null +++ b/Documentation/devicetree/bindings/usb/msm-ssusb.txt @@ -0,0 +1,104 @@ +MSM SuperSpeed DWC3 USB SoC controller + + +DWC3 Highspeed USB PHY +====================== +Required properities : +- compatible : sould be "qcom,dwc3-hsphy"; +- reg : offset and length of the register set in the memory map +- clocks : phandles to clock instances of the device tree nodes +- clock-names : + "xo" : External reference clock 19 MHz + "sleep_a" : Sleep clock, used when USB3 core goes into low + power mode (U3). +-supply : phandle to the regulator device tree node +Required "supply-name" are: + "v1p8" : 1.8v supply for HSPHY + "v3p3" : 3.3v supply for HSPHY + "vbus" : vbus supply for host mode + "vddcx" : vdd supply for HS-PHY digital circuit operation + +DWC3 Superspeed USB PHY +======================= +Required properities : +- compatible : sould be "qcom,dwc3-ssphy"; +- reg : offset and length of the register set in the memory map +- clocks : phandles to clock instances of the device tree nodes +- clock-names : + "xo" : External reference clock 19 MHz + "ref" : Reference clock - used in host mode. +-supply : phandle to the regulator device tree node +Required "supply-name" are: + "v1p8" : 1.8v supply for SS-PHY + "vddcx" : vdd supply for SS-PHY digital circuit operation + +DWC3 controller wrapper +======================= +Required properties : +- compatible : should be "qcom,dwc3" +- reg : offset and length of the register set in the memory map + offset and length of the TCSR register for routing USB + signals to either picoPHY0 or picoPHY1. +- clocks : phandles to clock instances of the device tree nodes +- clock-names : + "core" : Master/Core clock, have to be >= 125 MHz for SS + operation and >= 60MHz for HS operation + "iface" : System bus AXI clock + "sleep" : Sleep clock, used when USB3 core goes into low + power mode (U3). + "utmi" : Generated by HS-PHY. Used to clock the low power + parts of thr HS Link layer. +Optional properties : +- gdsc-supply : phandle to the globally distributed switch controller + regulator node to the USB controller. +Required child node: +A child node must exist to represent the core DWC3 IP block. The name of +the node is not important. The content of the node is defined in dwc3.txt. + +Example device nodes: + + dwc3_hsphy: phy@f92f8800 { + compatible = "qcom,dwc3-hsphy"; + reg = <0xf92f8800 0x30>; + + clocks = <&cxo>, <&usb2a_phy_sleep_cxc>; + clock-names = "xo", "sleep_a"; + + vbus-supply = <&supply>; + vddcx-supply = <&supply>; + v1p8-supply = <&supply>; + v3p3-supply = <&supply>; + }; + + dwc3_ssphy: phy@f92f8830 { + compatible = "qcom,dwc3-ssphy"; + reg = <0xf92f8830 0x30>; + + clocks = <&cxo>, <&usb30_mock_utmi_cxc>; + clock-names = "xo", "ref"; + + vddcx-supply = <&supply>; + v1p8-supply = <&supply>; + }; + + usb@fd4ab000 { + compatible = "qcom,dwc3"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xfd4ab000 0x4>; + + clocks = <&usb30_master_cxc>, <&sys_noc_usb3_axi_cxc>, + <&usb30_sleep_cxc>, <&usb30_mock_utmi_cxc>; + clock-names = "core", "iface", "sleep", "utmi"; + + gdsc-supply = <&supply>; + + ranges; + dwc3@f9200000 { + compatible = "snps,dwc3"; + reg = <0xf9200000 0xcd00>; + interrupts = <0 131 0>; + usb-phy = <&dwc3_hsphy>, <&dwc3_ssphy>; + tx-fifo-resize; + }; + };