| Message ID | 1383006690-6754-4-git-send-email-sboyd@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
On Tue, Oct 29, 2013 at 12:31:27AM +0000, Stephen Boyd wrote: > Qualcomm's Krait CPUs have a handful of L2 cache controller > registers that live behind a cp15 based indirection register. > First you program the indirection register (l2cpselr) to point > the L2 'window' register (l2cpdr) at what you want to read/write. > Then you read/write the 'window' register to do what you want. > The l2cpselr register is not banked per-cpu so we must lock > around accesses to it to prevent other CPUs from re-pointing > l2cpdr underneath us. > > Cc: Russell King <linux@arm.linux.org.uk> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> > --- > arch/arm/common/Kconfig | 3 ++ > arch/arm/common/Makefile | 1 + > arch/arm/common/krait-l2-accessors.c | 52 +++++++++++++++++++++++++++++++ > arch/arm/include/asm/krait-l2-accessors.h | 20 ++++++++++++ > 4 files changed, 76 insertions(+) > create mode 100644 arch/arm/common/krait-l2-accessors.c > create mode 100644 arch/arm/include/asm/krait-l2-accessors.h [...] > +void set_l2_indirect_reg(u32 addr, u32 val) > +{ > + unsigned long flags; > + > + raw_spin_lock_irqsave(&krait_l2_lock, flags); > + > + asm volatile ("mcr p15, 3, %0, c15, c0, 6" : : "r" (addr)); > + isb(); > + asm volatile ("mcr p15, 3, %0, c15, c0, 7" : : "r" (val)); > + isb(); > + > + raw_spin_unlock_irqrestore(&krait_l2_lock, flags); > +} > +EXPORT_SYMBOL(set_l2_indirect_reg); It might be worth commmenting inline as to what register each of these is accessing. Inevitably the commit message will become harder to find and associate with the code over time. Similarly for get_l2_indirect_reg. Thanks, Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 10/28/13 18:19, Mark Rutland wrote: > On Tue, Oct 29, 2013 at 12:31:27AM +0000, Stephen Boyd wrote: >> Qualcomm's Krait CPUs have a handful of L2 cache controller >> registers that live behind a cp15 based indirection register. >> First you program the indirection register (l2cpselr) to point >> the L2 'window' register (l2cpdr) at what you want to read/write. >> Then you read/write the 'window' register to do what you want. >> The l2cpselr register is not banked per-cpu so we must lock >> around accesses to it to prevent other CPUs from re-pointing >> l2cpdr underneath us. >> >> Cc: Russell King <linux@arm.linux.org.uk> >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> >> --- >> arch/arm/common/Kconfig | 3 ++ >> arch/arm/common/Makefile | 1 + >> arch/arm/common/krait-l2-accessors.c | 52 +++++++++++++++++++++++++++++++ >> arch/arm/include/asm/krait-l2-accessors.h | 20 ++++++++++++ >> 4 files changed, 76 insertions(+) >> create mode 100644 arch/arm/common/krait-l2-accessors.c >> create mode 100644 arch/arm/include/asm/krait-l2-accessors.h > [...] > >> +void set_l2_indirect_reg(u32 addr, u32 val) >> +{ >> + unsigned long flags; >> + >> + raw_spin_lock_irqsave(&krait_l2_lock, flags); >> + >> + asm volatile ("mcr p15, 3, %0, c15, c0, 6" : : "r" (addr)); >> + isb(); >> + asm volatile ("mcr p15, 3, %0, c15, c0, 7" : : "r" (val)); >> + isb(); >> + >> + raw_spin_unlock_irqrestore(&krait_l2_lock, flags); >> +} >> +EXPORT_SYMBOL(set_l2_indirect_reg); > It might be worth commmenting inline as to what register each of these is > accessing. Inevitably the commit message will become harder to find and > associate with the code over time. > > Similarly for get_l2_indirect_reg. Do you mean with the "@" syntax in the assembly? The 80-character limit is out to get me.
On Tue, Oct 29, 2013 at 01:21:57AM +0000, Stephen Boyd wrote: > On 10/28/13 18:19, Mark Rutland wrote: > > On Tue, Oct 29, 2013 at 12:31:27AM +0000, Stephen Boyd wrote: > >> Qualcomm's Krait CPUs have a handful of L2 cache controller > >> registers that live behind a cp15 based indirection register. > >> First you program the indirection register (l2cpselr) to point > >> the L2 'window' register (l2cpdr) at what you want to read/write. > >> Then you read/write the 'window' register to do what you want. > >> The l2cpselr register is not banked per-cpu so we must lock > >> around accesses to it to prevent other CPUs from re-pointing > >> l2cpdr underneath us. > >> > >> Cc: Russell King <linux@arm.linux.org.uk> > >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> > >> --- > >> arch/arm/common/Kconfig | 3 ++ > >> arch/arm/common/Makefile | 1 + > >> arch/arm/common/krait-l2-accessors.c | 52 +++++++++++++++++++++++++++++++ > >> arch/arm/include/asm/krait-l2-accessors.h | 20 ++++++++++++ > >> 4 files changed, 76 insertions(+) > >> create mode 100644 arch/arm/common/krait-l2-accessors.c > >> create mode 100644 arch/arm/include/asm/krait-l2-accessors.h > > [...] > > > >> +void set_l2_indirect_reg(u32 addr, u32 val) > >> +{ > >> + unsigned long flags; > >> + > >> + raw_spin_lock_irqsave(&krait_l2_lock, flags); > >> + > >> + asm volatile ("mcr p15, 3, %0, c15, c0, 6" : : "r" (addr)); > >> + isb(); > >> + asm volatile ("mcr p15, 3, %0, c15, c0, 7" : : "r" (val)); > >> + isb(); > >> + > >> + raw_spin_unlock_irqrestore(&krait_l2_lock, flags); > >> +} > >> +EXPORT_SYMBOL(set_l2_indirect_reg); > > It might be worth commmenting inline as to what register each of these is > > accessing. Inevitably the commit message will become harder to find and > > associate with the code over time. > > > > Similarly for get_l2_indirect_reg. > > Do you mean with the "@" syntax in the assembly? The 80-character limit > is out to get me. I probably didn't mean inline :) How about a block comment above the first asm block like: /* * Select the L2 window by poking l2cpselr, then write to the window via * l2cpdr. */ Thanks, Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 10/28, Mark Rutland wrote: > On Tue, Oct 29, 2013 at 01:21:57AM +0000, Stephen Boyd wrote: > > On 10/28/13 18:19, Mark Rutland wrote: > > > It might be worth commmenting inline as to what register each of these is > > > accessing. Inevitably the commit message will become harder to find and > > > associate with the code over time. > > > > > > Similarly for get_l2_indirect_reg. > > > > Do you mean with the "@" syntax in the assembly? The 80-character limit > > is out to get me. > > I probably didn't mean inline :) > > How about a block comment above the first asm block like: > > /* > * Select the L2 window by poking l2cpselr, then write to the window via > * l2cpdr. > */ > Ok sure.
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index c3a4e9c..9da52dc 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -9,6 +9,9 @@ config DMABOUNCE bool select ZONE_DMA +config KRAIT_L2_ACCESSORS + bool + config SHARP_LOCOMO bool diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 8c60f47..606131a 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_ICST) += icst.o obj-$(CONFIG_SA1111) += sa1111.o obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o obj-$(CONFIG_DMABOUNCE) += dmabounce.o +obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o obj-$(CONFIG_SHARP_LOCOMO) += locomo.o obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o obj-$(CONFIG_SHARP_SCOOP) += scoop.o diff --git a/arch/arm/common/krait-l2-accessors.c b/arch/arm/common/krait-l2-accessors.c new file mode 100644 index 0000000..c579794 --- /dev/null +++ b/arch/arm/common/krait-l2-accessors.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/spinlock.h> +#include <linux/export.h> + +#include <asm/barrier.h> +#include <asm/krait-l2-accessors.h> + +static DEFINE_RAW_SPINLOCK(krait_l2_lock); + +void set_l2_indirect_reg(u32 addr, u32 val) +{ + unsigned long flags; + + raw_spin_lock_irqsave(&krait_l2_lock, flags); + + asm volatile ("mcr p15, 3, %0, c15, c0, 6" : : "r" (addr)); + isb(); + asm volatile ("mcr p15, 3, %0, c15, c0, 7" : : "r" (val)); + isb(); + + raw_spin_unlock_irqrestore(&krait_l2_lock, flags); +} +EXPORT_SYMBOL(set_l2_indirect_reg); + +u32 get_l2_indirect_reg(u32 addr) +{ + u32 val; + unsigned long flags; + + raw_spin_lock_irqsave(&krait_l2_lock, flags); + + asm volatile ("mcr p15, 3, %0, c15, c0, 6" : : "r" (addr)); + isb(); + asm volatile ("mrc p15, 3, %0, c15, c0, 7" : "=r" (val)); + + raw_spin_unlock_irqrestore(&krait_l2_lock, flags); + + return val; +} +EXPORT_SYMBOL(get_l2_indirect_reg); diff --git a/arch/arm/include/asm/krait-l2-accessors.h b/arch/arm/include/asm/krait-l2-accessors.h new file mode 100644 index 0000000..d5305c4 --- /dev/null +++ b/arch/arm/include/asm/krait-l2-accessors.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASMARM_KRAIT_L2_ACCESSORS_H +#define __ASMARM_KRAIT_L2_ACCESSORS_H + +extern void set_l2_indirect_reg(u32 addr, u32 val); +extern u32 get_l2_indirect_reg(u32 addr); + +#endif
Qualcomm's Krait CPUs have a handful of L2 cache controller registers that live behind a cp15 based indirection register. First you program the indirection register (l2cpselr) to point the L2 'window' register (l2cpdr) at what you want to read/write. Then you read/write the 'window' register to do what you want. The l2cpselr register is not banked per-cpu so we must lock around accesses to it to prevent other CPUs from re-pointing l2cpdr underneath us. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> --- arch/arm/common/Kconfig | 3 ++ arch/arm/common/Makefile | 1 + arch/arm/common/krait-l2-accessors.c | 52 +++++++++++++++++++++++++++++++ arch/arm/include/asm/krait-l2-accessors.h | 20 ++++++++++++ 4 files changed, 76 insertions(+) create mode 100644 arch/arm/common/krait-l2-accessors.c create mode 100644 arch/arm/include/asm/krait-l2-accessors.h