From patchwork Fri Apr 4 18:45:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 3940401 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6246DBFF02 for ; Fri, 4 Apr 2014 19:00:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80A0220395 for ; Fri, 4 Apr 2014 19:00:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9E7E5202FF for ; Fri, 4 Apr 2014 18:59:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753996AbaDDS7X (ORCPT ); Fri, 4 Apr 2014 14:59:23 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:59324 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754038AbaDDSpl (ORCPT ); Fri, 4 Apr 2014 14:45:41 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 8145913F129; Fri, 4 Apr 2014 18:45:41 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 7466813F12F; Fri, 4 Apr 2014 18:45:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E871D13F12A; Fri, 4 Apr 2014 18:45:40 +0000 (UTC) From: Stephen Boyd To: Mike Turquette Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Brown , Saravana Kannan , Subject: [PATCH 4/4] devicetree: bindings: qcom,mmcc: Document GDSC binding Date: Fri, 4 Apr 2014 11:45:36 -0700 Message-Id: <1396637136-29974-5-git-send-email-sboyd@codeaurora.org> X-Mailer: git-send-email 1.9.0.1.gd5ccf8c In-Reply-To: <1396637136-29974-1-git-send-email-sboyd@codeaurora.org> References: <1396637136-29974-1-git-send-email-sboyd@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the GDSC nodes present within the multimedia clock controller. Cc: Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/qcom,mmcc.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt b/Documentation/devicetree/bindings/clock/qcom,mmcc.txt index d572e9964c54..695f86ad94ea 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.txt @@ -19,3 +19,45 @@ Example: #clock-cells = <1>; #reset-cells = <1>; }; + +Qualcomm Global Distributed Switch Controller (GDSC) Binding +------------------------------------------------------------ + +The GDSC is responsible for safely collapsing and restoring power to +peripheral cores on chipsets like msm8974 for power savings. + +Required properties: + - regulator-name: A string used as a descriptive name for regulator outputs + +Optional properties: + - parent-supply: phandle to the parent supply/regulator node + - qcom,retain-mem: Presence denotes a hardware requirement to leave the + forced core memory retention signals in the core's clock + branch control registers asserted. + - qcom,retain-periph: Presence denotes a hardware requirement to leave the + forced periph memory retention signal in the core's clock + branch control registers asserted. + - qcom,skip-logic-collapse: Presence denotes a requirement to leave power to + the core's logic enabled. + - qcom,support-hw-trigger: Presence denotes a hardware feature to switch + on/off this regulator based on internal HW signals + to save more power. + +Example: + clock-controller@4000000 { + compatible = "qcom,mmcc-msm8974"; + reg = <0x4000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + + regulators { + gdsc_oxili_gx: gdsc_oxili_gx { + regulator-name = "gdsc_oxili_gx"; + parent-supply = <&pm8841_s4>; + qcom,retain-mem; + qcom,retain-periph; + qcom,skip-logic-collapse; + qcom,support-hw-trigger; + }; + }; + };