From patchwork Fri Apr 4 19:57:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 3940551 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 67F2F9F1EE for ; Fri, 4 Apr 2014 19:57:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8A11720395 for ; Fri, 4 Apr 2014 19:57:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A534D2037A for ; Fri, 4 Apr 2014 19:57:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754047AbaDDT5k (ORCPT ); Fri, 4 Apr 2014 15:57:40 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:37896 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753426AbaDDT5f (ORCPT ); Fri, 4 Apr 2014 15:57:35 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 8347513F02B; Fri, 4 Apr 2014 19:57:35 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 777DC13F363; Fri, 4 Apr 2014 19:57:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E3A6213F326; Fri, 4 Apr 2014 19:57:34 +0000 (UTC) From: Stephen Boyd To: Kumar Gala Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, Borislav Petkov Subject: [PATCH v6 5/5] ARM: dts: msm: Fix Krait CPU/L2 nodes Date: Fri, 4 Apr 2014 12:57:30 -0700 Message-Id: <1396641450-12854-6-git-send-email-sboyd@codeaurora.org> X-Mailer: git-send-email 1.9.0.1.gd5ccf8c In-Reply-To: <1396641450-12854-1-git-send-email-sboyd@codeaurora.org> References: <1396641450-12854-1-git-send-email-sboyd@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The error interrupt binding wasn't properly accepted when this was originally written. Fix the dts to match the binding. Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-msm8960.dtsi | 29 +++++++++++++++------- arch/arm/boot/dts/qcom-msm8974.dtsi | 49 ++++++++++++++++++++++++++++--------- 2 files changed, 57 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 997b7b94e117..66a6e8c4fdcf 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -12,30 +12,41 @@ cpus { #address-cells = <1>; #size-cells = <0>; - interrupts = <1 14 0x304>; - compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v1"; cpu@0 { + compatible = "qcom,krait"; device_type = "cpu"; reg = <0>; - next-level-cache = <&L2>; + next-level-cache = <&L1_0>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + + L1_0: l1-cache { + compatible = "qcom,arch-cache"; + interrupts = <1 14 0x104>; + next-level-cache = <&L2>; + }; + + L2: l2-cache { + compatible = "qcom,arch-cache"; + interrupts = <0 2 0x4>; + }; }; cpu@1 { + compatible = "qcom,krait"; device_type = "cpu"; reg = <1>; - next-level-cache = <&L2>; + next-level-cache = <&L1_1>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; - }; - L2: l2-cache { - compatible = "cache"; - cache-level = <2>; - interrupts = <0 2 0x4>; + L1_1: l1-cache { + compatible = "qcom,arch-cache"; + interrupts = <1 14 0x104>; + next-level-cache = <&L2>; + }; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index f68723918b3f..b4ac497b7d76 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -12,43 +12,68 @@ cpus { #address-cells = <1>; #size-cells = <0>; - interrupts = <1 9 0xf04>; - compatible = "qcom,krait"; enable-method = "qcom,kpss-acc-v2"; cpu@0 { + compatible = "qcom,krait"; device_type = "cpu"; reg = <0>; - next-level-cache = <&L2>; + next-level-cache = <&L1_0>; qcom,acc = <&acc0>; + + L1_0: l1-cache { + compatible = "qcom,arch-cache"; + interrupts = <1 9 0x104>; + next-level-cache = <&L2>; + }; + + L2: l2-cache { + compatible = "qcom,arch-cache"; + interrupts = <0 2 0x4>; + qcom,saw = <&saw_l2>; + }; }; cpu@1 { + compatible = "qcom,krait"; device_type = "cpu"; reg = <1>; - next-level-cache = <&L2>; + next-level-cache = <&L1_1>; qcom,acc = <&acc1>; + + L1_1: l1-cache { + compatible = "qcom,arch-cache"; + interrupts = <1 9 0x204>; + next-level-cache = <&L2>; + }; }; cpu@2 { + compatible = "qcom,krait"; device_type = "cpu"; reg = <2>; - next-level-cache = <&L2>; + next-level-cache = <&L1_2>; qcom,acc = <&acc2>; + + L1_2: l1-cache { + compatible = "qcom,arch-cache"; + interrupts = <1 9 0x404>; + next-level-cache = <&L2>; + }; }; cpu@3 { + compatible = "qcom,krait"; device_type = "cpu"; reg = <3>; - next-level-cache = <&L2>; + next-level-cache = <&L1_3>; qcom,acc = <&acc3>; - }; - L2: l2-cache { - compatible = "cache"; - cache-level = <2>; - interrupts = <0 2 0x4>; - qcom,saw = <&saw_l2>; + L1_3: l1-cache { + compatible = "qcom,arch-cache"; + interrupts = <1 9 0x804>; + next-level-cache = <&L2>; + }; }; };