From patchwork Mon Jun 2 09:10:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 4280621 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 32A3B9F1D6 for ; Mon, 2 Jun 2014 09:11:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6023D20158 for ; Mon, 2 Jun 2014 09:11:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 739C620340 for ; Mon, 2 Jun 2014 09:11:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753736AbaFBJKN (ORCPT ); Mon, 2 Jun 2014 05:10:13 -0400 Received: from mail-wi0-f182.google.com ([209.85.212.182]:33639 "EHLO mail-wi0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753722AbaFBJKJ (ORCPT ); Mon, 2 Jun 2014 05:10:09 -0400 Received: by mail-wi0-f182.google.com with SMTP id r20so4158627wiv.3 for ; Mon, 02 Jun 2014 02:10:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=G84IYddcCl0Zt1NuC/GiFi4m5149G7dBLkSFPKycHCI=; b=VtdFIVUXrRx3JKioQanNK1inXTjFB+LU5fdxn6KL3aQ+fb71QTNHZF4gdV7P+spLZm 9BCcto9YTva+874Ycl/WGz3YDAdH1nFxWkD21h0eMz4JkUhOSJ9759NDdTM+A+t85C1H r7nsVUpon82IBDI7rseXI7KBEP+gaN04BoSt0DiPZ8YqZDpo/0G40Q24hBra7dwX3Sf5 Ia14rkJYDCcwCna65UblXBcBxb5NSzUJHw4k9rz2xEgkCTkaMuzSWzUzc2nmwzHdzx91 ySAIHs/6U0t+5U9eZD2a3u4SWkt70A6/z8SfAQoi5MSuZVmTcTJJpaL4Rl3ZWJm56H0F LvVg== X-Gm-Message-State: ALoCoQnzREIcrgWwD+sTxFRe5yLD9k4SIQLjpX2BMgT1b4CV/jM823Zzkf30+/ZNNs4hB4xuH7F4 X-Received: by 10.180.183.131 with SMTP id em3mr20203225wic.56.1401700208347; Mon, 02 Jun 2014 02:10:08 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-149-12-106.as13285.net. [78.149.12.106]) by mx.google.com with ESMTPSA id o10sm33853868wjy.0.2014.06.02.02.10.06 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 Jun 2014 02:10:07 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v6 11/12] mmc: mmci: Add Qcom specific rx_fifocnt logic. Date: Mon, 2 Jun 2014 10:10:04 +0100 Message-Id: <1401700204-11876-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1401699818-11329-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1401699818-11329-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements a qcom specific get_rx_fifocnt function which is implemented based on status register flags. Based on qcom_fifo flag in variant data structure, the corresponding get_rx_fifocnt function is selected. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 30 ++++++++++++++++++++++++++++-- drivers/mmc/host/mmci.h | 1 + 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 08715ab..08ff8d2 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -73,6 +73,7 @@ static unsigned int fmax = 515633; * @busy_detect: true if busy detection on dat0 is supported * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply * @explicit_mclk_control: enable explicit mclk control in driver. + * @qcom_fifo: enables qcom specific fifo pio read logic. */ struct variant_data { unsigned int clkreg; @@ -95,6 +96,7 @@ struct variant_data { bool busy_detect; bool pwrreg_nopower; bool explicit_mclk_control; + bool qcom_fifo; }; static struct variant_data variant_arm = { @@ -990,15 +992,34 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } } +static int mmci_get_rx_fifocnt(struct mmci_host *host, u32 status, int remain) +{ + return remain - (readl(host->base + MMCIFIFOCNT) << 2); +} + +static int mmci_qcom_get_rx_fifocnt(struct mmci_host *host, u32 status, int r) +{ + /* + * on qcom SDCC4 only 8 words are used in each burst so only 8 addresses + * from the fifo range should be used + */ + if (status & MCI_RXFIFOHALFFULL) + return host->variant->fifohalfsize; + else if (status & MCI_RXDATAAVLBL) + return 4; + + return 0; +} + static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) { void __iomem *base = host->base; char *ptr = buffer; - u32 status; + u32 status = readl(host->base + MMCISTATUS); int host_remain = host->size; do { - int count = host_remain - (readl(base + MMCIFIFOCNT) << 2); + int count = host->get_rx_fifocnt(host, status, host_remain); if (count > remain) count = remain; @@ -1488,6 +1509,11 @@ static int mmci_probe(struct amba_device *dev, if (ret) goto host_free; + if (variant->qcom_fifo) + host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; + else + host->get_rx_fifocnt = mmci_get_rx_fifocnt; + host->plat = plat; host->variant = variant; host->mclk = clk_get_rate(host->clk); diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index ef34617..a1f5e4f 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -229,6 +229,7 @@ struct mmci_host { /* pio stuff */ struct sg_mapping_iter sg_miter; unsigned int size; + int (*get_rx_fifocnt)(struct mmci_host *h, u32 status, int remain); #ifdef CONFIG_DMA_ENGINE /* DMA stuff */