From patchwork Thu Jul 17 10:26:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: prakash.burla@smartplayin.com X-Patchwork-Id: 4574391 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2D506C0515 for ; Thu, 17 Jul 2014 10:26:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4924B2017D for ; Thu, 17 Jul 2014 10:26:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 60E3B20125 for ; Thu, 17 Jul 2014 10:26:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754827AbaGQK0l (ORCPT ); Thu, 17 Jul 2014 06:26:41 -0400 Received: from smtp102.iad3a.emailsrvr.com ([173.203.187.102]:36250 "EHLO smtp102.iad3a.emailsrvr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755370AbaGQK0k convert rfc822-to-8bit (ORCPT ); Thu, 17 Jul 2014 06:26:40 -0400 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp13.relay.iad3a.emailsrvr.com (SMTP Server) with ESMTP id D82B7100807; Thu, 17 Jul 2014 06:26:39 -0400 (EDT) X-Virus-Scanned: OK Received: from app21.wa-webapps.iad3a (relay.iad3a.rsapps.net [172.27.255.110]) by smtp13.relay.iad3a.emailsrvr.com (SMTP Server) with ESMTP id B025C1002DE; Thu, 17 Jul 2014 06:26:39 -0400 (EDT) Received: from smartplayin.com (localhost.localdomain [127.0.0.1]) by app21.wa-webapps.iad3a (Postfix) with ESMTP id A110328005A; Thu, 17 Jul 2014 06:26:39 -0400 (EDT) Received: by apps.rackspace.com (Authenticated sender: prakash.burla@smartplayin.com, from: prakash.burla@smartplayin.com) with HTTP; Thu, 17 Jul 2014 06:26:39 -0400 (EDT) Date: Thu, 17 Jul 2014 06:26:39 -0400 (EDT) Subject: RE: Fwd: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant From: prakash.burla@smartplayin.com To: srinivas.kandagatla@linaro.org Cc: linux@arm.linux.org.uk, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org MIME-Version: 1.0 Importance: Normal X-Priority: 3 (Normal) X-Type: plain In-Reply-To: References: <1401699818-11329-1-git-send-email-srinivas.kandagatla@linaro.org> <1401700146-11588-1-git-send-email-srinivas.kandagatla@linaro.org> Message-ID: <1405592799.65820182@apps.rackspace.com> X-Mailer: webmail7.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP tested-by: Prakash Burla This driver tested on AP806X with mmc Driver. ---------------------------------------------------------------------------------- From: Date: Mon, Jun 2, 2014 at 2:39 PM Subject: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas From: Srinivas Kandagatla Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit position datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 5 +++++ 1 file changed, 5 insertions(+) * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock @@ -75,6 +77,7 @@ struct variant_data { bool sdio; bool st_clkdiv; bool blksz_datactrl16; + bool blksz_datactrl4; u32 pwrreg_powerup; bool signal_direction; bool pwrreg_clkgate; @@ -731,6 +734,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) if (variant->blksz_datactrl16) datactrl = MCI_DPSM_ENABLE | (data->blksz << 16); + else if (variant->blksz_datactrl4) + datactrl = MCI_DPSM_ENABLE | (data->blksz << 4); else datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index ed20bf5..72981f6 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -60,6 +60,8 @@ static unsigned int fmax = 515633; * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register + * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl + * register * @pwrreg_powerup: power up value for MMCIPOWER register * @signal_direction: input/out direction of bus signals can be indicated