Message ID | 1407175263-10699-3-git-send-email-ohaugan@codeaurora.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi Olav, On Mon, Aug 04, 2014 at 07:01:03PM +0100, Olav Haugan wrote: > The SMR registers do not exist when stream matching is not > supported by the hardware. Avoid writing to this register if not needed. > > Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> > --- > drivers/iommu/arm-smmu.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index c16431f..1f3a5b3 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -1731,7 +1731,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) > > /* Mark all SMRn as invalid and all S2CRn as bypass */ > for (i = 0; i < smmu->num_mapping_groups; ++i) { > - writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(i)); > + if (smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) { > + writel_relaxed(~SMR_VALID, > + gr0_base + ARM_SMMU_GR0_SMR(i)); > + } > writel_relaxed(S2CR_TYPE_BYPASS, > gr0_base + ARM_SMMU_GR0_S2CR(i)); smmu->num_mapping_groups should be zero for an SMMU that doesn't include the SMR registers, so I don't think this change is needed. Are you seeing problems with real hardware? Will -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 8/6/2014 3:19 AM, Will Deacon wrote: > Hi Olav, > > On Mon, Aug 04, 2014 at 07:01:03PM +0100, Olav Haugan wrote: >> The SMR registers do not exist when stream matching is not >> supported by the hardware. Avoid writing to this register if not needed. >> >> Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> >> --- >> drivers/iommu/arm-smmu.c | 5 ++++- >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index c16431f..1f3a5b3 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -1731,7 +1731,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) >> >> /* Mark all SMRn as invalid and all S2CRn as bypass */ >> for (i = 0; i < smmu->num_mapping_groups; ++i) { >> - writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(i)); >> + if (smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) { >> + writel_relaxed(~SMR_VALID, >> + gr0_base + ARM_SMMU_GR0_SMR(i)); >> + } >> writel_relaxed(S2CR_TYPE_BYPASS, >> gr0_base + ARM_SMMU_GR0_S2CR(i)); > > smmu->num_mapping_groups should be zero for an SMMU that doesn't include > the SMR registers, so I don't think this change is needed. Are you seeing > problems with real hardware? Yes, you are correct. However, since that is the case we wouldn't be setting the S2CR registers to bypass then? Seems like num_mappings_groups should be initialized regardless whether stream matching or stream indexing is used. SMMU_IDR0.NUMSMRG specifies the number of stream mapping register groups (Section 2.5.2 of the ARM SMMUv1-v2 spec). So with stream indexing support this register should still tell us how many S2CR registers exist? As far as I can tell there are no other register telling us how many S2CR registers exist. That also brings up another point that there is no check in the code to ensure we are not trying to program more than the available S2CR registers when we use stream indexing. No, I don't see any issue on real hardware. Thanks, Olav
Hi Olav, On Wed, Aug 06, 2014 at 05:44:38PM +0100, Olav Haugan wrote: > On 8/6/2014 3:19 AM, Will Deacon wrote: > > On Mon, Aug 04, 2014 at 07:01:03PM +0100, Olav Haugan wrote: > >> The SMR registers do not exist when stream matching is not > >> supported by the hardware. Avoid writing to this register if not needed. > >> > >> Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> > >> --- > >> drivers/iommu/arm-smmu.c | 5 ++++- > >> 1 file changed, 4 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > >> index c16431f..1f3a5b3 100644 > >> --- a/drivers/iommu/arm-smmu.c > >> +++ b/drivers/iommu/arm-smmu.c > >> @@ -1731,7 +1731,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) > >> > >> /* Mark all SMRn as invalid and all S2CRn as bypass */ > >> for (i = 0; i < smmu->num_mapping_groups; ++i) { > >> - writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(i)); > >> + if (smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) { > >> + writel_relaxed(~SMR_VALID, > >> + gr0_base + ARM_SMMU_GR0_SMR(i)); > >> + } > >> writel_relaxed(S2CR_TYPE_BYPASS, > >> gr0_base + ARM_SMMU_GR0_S2CR(i)); > > > > smmu->num_mapping_groups should be zero for an SMMU that doesn't include > > the SMR registers, so I don't think this change is needed. Are you seeing > > problems with real hardware? > > Yes, you are correct. However, since that is the case we wouldn't be > setting the S2CR registers to bypass then? Seems like > num_mappings_groups should be initialized regardless whether stream > matching or stream indexing is used. SMMU_IDR0.NUMSMRG specifies the > number of stream mapping register groups (Section 2.5.2 of the ARM > SMMUv1-v2 spec). So with stream indexing support this register should > still tell us how many S2CR registers exist? Hmm, I'm checking this with the architects because the TRMs aren't exactly clear. The NUMSMRG works for stream-indexing (i.e. reports the number of S2CRs), then all we have to do is change the above ~SMR_VALID to 0x0, since those registers will be SBZP. > As far as I can tell there are no other register telling us how many S2CR > registers exist. That also brings up another point that there is no check > in the code to ensure we are not trying to program more than the available > S2CR registers when we use stream indexing. On an SMMU using stream-indexing, if the StreamID goes off the end of the S2CRs that's a fairly serious hardware configuration issue which I don't think Linux is in a position to handle. I agree that a warning wouldn't hurt on device add/attach though. Will -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 8/6/2014 10:35 AM, Will Deacon wrote: > Hi Olav, > > On Wed, Aug 06, 2014 at 05:44:38PM +0100, Olav Haugan wrote: >> On 8/6/2014 3:19 AM, Will Deacon wrote: >>> On Mon, Aug 04, 2014 at 07:01:03PM +0100, Olav Haugan wrote: >>>> The SMR registers do not exist when stream matching is not >>>> supported by the hardware. Avoid writing to this register if not needed. >>>> >>>> Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> >>>> --- >>>> drivers/iommu/arm-smmu.c | 5 ++++- >>>> 1 file changed, 4 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >>>> index c16431f..1f3a5b3 100644 >>>> --- a/drivers/iommu/arm-smmu.c >>>> +++ b/drivers/iommu/arm-smmu.c >>>> @@ -1731,7 +1731,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) >>>> >>>> /* Mark all SMRn as invalid and all S2CRn as bypass */ >>>> for (i = 0; i < smmu->num_mapping_groups; ++i) { >>>> - writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(i)); >>>> + if (smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) { >>>> + writel_relaxed(~SMR_VALID, >>>> + gr0_base + ARM_SMMU_GR0_SMR(i)); >>>> + } >>>> writel_relaxed(S2CR_TYPE_BYPASS, >>>> gr0_base + ARM_SMMU_GR0_S2CR(i)); >>> >>> smmu->num_mapping_groups should be zero for an SMMU that doesn't include >>> the SMR registers, so I don't think this change is needed. Are you seeing >>> problems with real hardware? >> >> Yes, you are correct. However, since that is the case we wouldn't be >> setting the S2CR registers to bypass then? Seems like >> num_mappings_groups should be initialized regardless whether stream >> matching or stream indexing is used. SMMU_IDR0.NUMSMRG specifies the >> number of stream mapping register groups (Section 2.5.2 of the ARM >> SMMUv1-v2 spec). So with stream indexing support this register should >> still tell us how many S2CR registers exist? > > Hmm, I'm checking this with the architects because the TRMs aren't exactly > clear. The NUMSMRG works for stream-indexing (i.e. reports the number of > S2CRs), then all we have to do is change the above ~SMR_VALID to 0x0, since > those registers will be SBZP. You don't agree that we should avoid doing register writes if not necessarily? In general I like to avoid trying to write registers that is not needed so that we don't do more work than needed. > >> As far as I can tell there are no other register telling us how many S2CR >> registers exist. That also brings up another point that there is no check >> in the code to ensure we are not trying to program more than the available >> S2CR registers when we use stream indexing. > > On an SMMU using stream-indexing, if the StreamID goes off the end of the > S2CRs that's a fairly serious hardware configuration issue which I don't > think Linux is in a position to handle. I agree that a warning wouldn't > hurt on device add/attach though. > Yes, I meant to protect against programming errors where someone specified more Stream IDs than available S2CRs. Thanks, Olav
On Thu, Aug 07, 2014 at 12:34:09AM +0100, Olav Haugan wrote: > On 8/6/2014 10:35 AM, Will Deacon wrote: > > Hmm, I'm checking this with the architects because the TRMs aren't exactly > > clear. The NUMSMRG works for stream-indexing (i.e. reports the number of > > S2CRs), then all we have to do is change the above ~SMR_VALID to 0x0, since > > those registers will be SBZP. > > You don't agree that we should avoid doing register writes if not > necessarily? In general I like to avoid trying to write registers that > is not needed so that we don't do more work than needed. If this was a fast-path then I'd certainly agree. However, device reset is a pretty rare event and I'd be inclined to err on the side of code clarity in preference to performance. Anyway, it turns out that we can't use NUMSMRG for this so all that's moot. We instead need to do 1 << SMMU_IDR0.NUMSIDB, which will give us the number of S2CRs. > >> As far as I can tell there are no other register telling us how many S2CR > >> registers exist. That also brings up another point that there is no check > >> in the code to ensure we are not trying to program more than the available > >> S2CR registers when we use stream indexing. > > > > On an SMMU using stream-indexing, if the StreamID goes off the end of the > > S2CRs that's a fairly serious hardware configuration issue which I don't > > think Linux is in a position to handle. I agree that a warning wouldn't > > hurt on device add/attach though. > > > > Yes, I meant to protect against programming errors where someone > specified more Stream IDs than available S2CRs. Sure. Could you have a go at hacking this up, please? Will -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 8/7/2014 2:22 AM, Will Deacon wrote: > On Thu, Aug 07, 2014 at 12:34:09AM +0100, Olav Haugan wrote: >> On 8/6/2014 10:35 AM, Will Deacon wrote: >>> Hmm, I'm checking this with the architects because the TRMs aren't exactly >>> clear. The NUMSMRG works for stream-indexing (i.e. reports the number of >>> S2CRs), then all we have to do is change the above ~SMR_VALID to 0x0, since >>> those registers will be SBZP. >> >> You don't agree that we should avoid doing register writes if not >> necessarily? In general I like to avoid trying to write registers that >> is not needed so that we don't do more work than needed. > > If this was a fast-path then I'd certainly agree. However, device reset is > a pretty rare event and I'd be inclined to err on the side of code clarity > in preference to performance. > > Anyway, it turns out that we can't use NUMSMRG for this so all that's moot. > We instead need to do 1 << SMMU_IDR0.NUMSIDB, which will give us the number > of S2CRs. > >>>> As far as I can tell there are no other register telling us how many S2CR >>>> registers exist. That also brings up another point that there is no check >>>> in the code to ensure we are not trying to program more than the available >>>> S2CR registers when we use stream indexing. >>> >>> On an SMMU using stream-indexing, if the StreamID goes off the end of the >>> S2CRs that's a fairly serious hardware configuration issue which I don't >>> think Linux is in a position to handle. I agree that a warning wouldn't >>> hurt on device add/attach though. >>> >> >> Yes, I meant to protect against programming errors where someone >> specified more Stream IDs than available S2CRs. > > Sure. Could you have a go at hacking this up, please? > Yes, I'll update the patches. Thanks for clarifying how to determine the # of S2CRs. Thanks, Olav
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index c16431f..1f3a5b3 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1731,7 +1731,10 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) /* Mark all SMRn as invalid and all S2CRn as bypass */ for (i = 0; i < smmu->num_mapping_groups; ++i) { - writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(i)); + if (smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) { + writel_relaxed(~SMR_VALID, + gr0_base + ARM_SMMU_GR0_SMR(i)); + } writel_relaxed(S2CR_TYPE_BYPASS, gr0_base + ARM_SMMU_GR0_S2CR(i)); }
The SMR registers do not exist when stream matching is not supported by the hardware. Avoid writing to this register if not needed. Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> --- drivers/iommu/arm-smmu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)