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[24.8.37.141]) by mx.google.com with ESMTPSA id yt6sm4062230igb.10.2014.08.07.21.01.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 Aug 2014 21:01:17 -0700 (PDT) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, amit.kucheria@linaro.org, sboyd@codeaurora.org, davidb@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@vger.kernel.org Cc: msivasub@codeaurora.org, bryanh@codeaurora.org, Lina Iyer Subject: [RFC] [PATCH 11/13] qcom: cpuidle: Add cpuidle driver for QCOM cpus Date: Thu, 7 Aug 2014 22:00:56 -0600 Message-Id: <1407470458-22900-12-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407470458-22900-1-git-send-email-lina.iyer@linaro.org> References: <1407470458-22900-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add cpuidle driver interface to allow cpus to go into C-States. Signed-off-by: Lina Iyer --- .../devicetree/bindings/arm/msm/qcom,cpuidle.txt | 73 +++++++++++ drivers/cpuidle/Makefile | 1 + drivers/cpuidle/cpuidle-qcom.c | 140 +++++++++++++++++++++ 3 files changed, 214 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,cpuidle.txt create mode 100644 drivers/cpuidle/cpuidle-qcom.c diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,cpuidle.txt b/Documentation/devicetree/bindings/arm/msm/qcom,cpuidle.txt new file mode 100644 index 0000000..b094baf --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,cpuidle.txt @@ -0,0 +1,73 @@ +Qualcomm CPUIdle driver + +The Qualcomm cpuidle driver enables the processor to enter low power modes +when idle. The processors support 4 low power modes. + wfi - also known as clock gating + retention - processor clock gated and processor power is reduced. + standalone-pc - processor is powered down and when reset, the core + boots into secure mode and trampolines back to the kernel. + Every core can individually enter this low power mode without + affecting the state of the other cores. + pc - essentially standalone power collapse, but indicates that the + latency to put SoC into a low power state is tolerable. + +The cpuidle node is comprised of nodes, each of which represent a C-State the +processor can achieve. Each node provides the latency and residency which +helps the cpuidle governor to choose the appropriate low power mode based on +the time available. Not all SoCs may support all the above low power modes. + +PROPERTIES + +- compatible: + Usage: required + Value type: + Definition: Should be "qcom,cpuidle" + +- qcom,cpu-level: + Usage: required + Value type: { Node } + Definition: Describes a C-State of the processor + + PROPERTIES of qcom,cpu-level + + - reg: + Usage: required + Value type: + Definition: Index of the C-State + + - qcom,state-name: + Usage: required + Value type: + Definition: C-State moniker + + - qcom,spm-cpu-mode: + Usage: required + Value type: + Definition: The description of the h/w mode that will be + achieved in this C-State. + + - qcom,latency-us: + Usage: required + Value type: + Defintion: Time taken to exit from the C-State + + - qcom,residency-us: + Usage: required + Value type: + Defintion: Time to be spent in this C-State for the power + saving to be beneficial. + +Example: + + qcom,cpuidle { + compatible = "qcom,cpuidle"; + #address-cells = <1>; + #size-cells = <0>; + qcom,cpu-level@0 { + reg = <0x0>; + qcom,state-name = "C1"; + qcom,spm-cpu-mode = "wfi"; + qcom,latency-us = <1>; + qcom,residency-us = <1>; + }; + }; diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index 11edb31..4a2c446 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_ARM_ZYNQ_CPUIDLE) += cpuidle-zynq.o obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o +obj-$(CONFIG_ARM_QCOM_CPUIDLE) += cpuidle-qcom.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-qcom.c b/drivers/cpuidle/cpuidle-qcom.c new file mode 100644 index 0000000..8e70a88 --- /dev/null +++ b/drivers/cpuidle/cpuidle-qcom.c @@ -0,0 +1,140 @@ +/* Copyright (c) 2014, The Linux Foundation. All rights reserved. + * Copyright (c) 2014 Linaro. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +#include + +struct lookup { + enum msm_pm_sleep_mode mode; + char *name; +}; + +static enum msm_pm_sleep_mode spm_sleep_modes[MSM_PM_SLEEP_MODE_NR]; + +static int qcom_lpm_enter(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + return msm_cpu_pm_enter_sleep(spm_sleep_modes[index], true); +} + +static struct cpuidle_driver qcom_cpuidle_driver = { + .name = "qcom_cpuidle", + .owner = THIS_MODULE, +}; + +static int qcom_cpuidle_probe(struct platform_device *pdev) +{ + int ret; + struct device_node *top = pdev->dev.of_node; + struct device_node *n; + char *key; + const char *val; + int index = 0; + int i; + struct cpuidle_state *state; + static const struct lookup pm_sm_lookup[] = { + {MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT, + "wfi"}, + {MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE, + "standalone_pc"}, + {MSM_PM_SLEEP_MODE_POWER_COLLAPSE, + "pc"}, + {MSM_PM_SLEEP_MODE_RETENTION, + "retention"}, + }; + + if (!top) + return -ENODEV; + + for_each_child_of_node(top, n) { + key = "qcom,cpu-level"; + if (of_node_cmp(n->name, key)) + continue; + + state = &qcom_cpuidle_driver.states[index]; + + key = "qcom,spm-cpu-mode"; + ret = of_property_read_string(n, key, &val); + if (ret) + goto failed; + for (i = 0; i < ARRAY_SIZE(pm_sm_lookup); i++) { + if (!strcmp(val, pm_sm_lookup[i].name)) { + spm_sleep_modes[index] = pm_sm_lookup[i].mode; + break; + } + } + if (i == ARRAY_SIZE(pm_sm_lookup)) { + ret = -EFAULT; + goto failed; + } + + strncpy(state->desc, val, CPUIDLE_DESC_LEN); + + key = "qcom,state-name"; + ret = of_property_read_string(n, key, &val); + if (ret) + goto failed; + strncpy(state->name, val, CPUIDLE_NAME_LEN); + + key = "qcom,latency-us"; + ret = of_property_read_u32(n, key, &state->exit_latency); + if (ret) + goto failed; + + key = "qcom,residency-us"; + ret = of_property_read_u32(n, key, &state->target_residency); + if (ret) + goto failed; + + state->flags = CPUIDLE_FLAG_TIME_VALID; + state->enter = qcom_lpm_enter; + index++; + } + + qcom_cpuidle_driver.state_count = index; + qcom_cpuidle_driver.safe_state_index = 0; + + ret = cpuidle_register(&qcom_cpuidle_driver, NULL); + if (ret) { + dev_err(&pdev->dev, "failed to register cpuidle driver\n"); + return ret; + } + + return 0; + +failed: + dev_err(&pdev->dev, "error parsing key: %s\n", key); + return ret; +} + +static struct of_device_id qcom_cpuidle_match_tbl[] = { + {.compatible = "qcom,cpuidle"}, + {}, +}; + +static struct platform_driver qcom_cpuidle_platform_driver = { + .probe = qcom_cpuidle_probe, + .driver = { + .name = "qcom,cpuidle", + .owner = THIS_MODULE, + .of_match_table = qcom_cpuidle_match_tbl, + }, +}; + +module_platform_driver(qcom_cpuidle_platform_driver);