From patchwork Thu Aug 14 13:31:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dolev Raviv X-Patchwork-Id: 4724141 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E203BC0338 for ; Thu, 14 Aug 2014 13:32:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ABB82201E4 for ; Thu, 14 Aug 2014 13:32:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 94D77201D5 for ; Thu, 14 Aug 2014 13:31:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755144AbaHNNb4 (ORCPT ); Thu, 14 Aug 2014 09:31:56 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:35474 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755132AbaHNNby (ORCPT ); Thu, 14 Aug 2014 09:31:54 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 2116413FABD; Thu, 14 Aug 2014 13:31:54 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 1469213FAC1; Thu, 14 Aug 2014 13:31:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from lx-draviv2.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: draviv@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 65CB813FABD; Thu, 14 Aug 2014 13:31:51 +0000 (UTC) From: Dolev Raviv To: James.Bottomley@HansenPartnership.com, hch@infradead.org Cc: linux-scsi@vger.kernel.org, linux-scsi-owner@vger.kernel.org, linux-arm-msm@vger.kernel.org, santoshsy@gmail.com, Sahitya Tummala , Dolev Raviv Subject: [PATCH/RFC V2 13/16] scsi: ufs: Add freq-table-hz property for UFS device Date: Thu, 14 Aug 2014 16:31:04 +0300 Message-Id: <1408023067-26103-14-git-send-email-draviv@codeaurora.org> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1408023067-26103-1-git-send-email-draviv@codeaurora.org> References: <1408023067-26103-1-git-send-email-draviv@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sahitya Tummala Add freq-table-hz propery for UFS device to keep track of frequencies supported by UFS clocks. Signed-off-by: Sahitya Tummala Signed-off-by: Dolev Raviv diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index b0f791a..e73a619 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -24,11 +24,11 @@ Optional properties: - clocks : List of phandle and clock specifier pairs - clock-names : List of clock input name strings sorted in the same order as the clocks property. -- max-clock-frequency-hz : List of maximum operating frequency stored in the same - order as the clocks property. If this property is not - defined or a value in the array is "0" then it is assumed - that the frequency is set by the parent clock or a - fixed rate clock source. +- freq-table-hz : Array of operating frequencies stored in the same + order as the clocks property. If this property is not + defined or a value in the array is "0" then it is assumed + that the frequency is set by the parent clock or a + fixed rate clock source. Note: If above properties are not defined it can be assumed that the supply regulators or clocks are always on. @@ -49,5 +49,5 @@ Example: clocks = <&core 0>, <&ref 0>, <&iface 0>; clock-names = "core_clk", "ref_clk", "iface_clk"; - max-clock-frequency-hz = <100000000 19200000 0>; + freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; }; diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c index edaccd0..551be95 100644 --- a/drivers/scsi/ufs/ufshcd-pltfrm.c +++ b/drivers/scsi/ufs/ufshcd-pltfrm.c @@ -63,6 +63,8 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) char *name; u32 *clkfreq = NULL; struct ufs_clk_info *clki; + int len = 0; + size_t sz = 0; if (!np) goto out; @@ -82,39 +84,59 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (cnt <= 0) goto out; - clkfreq = kzalloc(cnt * sizeof(*clkfreq), GFP_KERNEL); + if (!of_get_property(np, "freq-table-hz", &len)) { + dev_info(dev, "freq-table-hz property not specified\n"); + goto out; + } + + if (len <= 0) + goto out; + + sz = len / sizeof(*clkfreq); + if (sz != 2 * cnt) { + dev_err(dev, "%s len mismatch\n", "freq-table-hz"); + ret = -EINVAL; + goto out; + } + + clkfreq = devm_kzalloc(dev, sz * sizeof(*clkfreq), + GFP_KERNEL); if (!clkfreq) { + dev_err(dev, "%s: no memory\n", "freq-table-hz"); ret = -ENOMEM; - dev_err(dev, "%s: memory alloc failed\n", __func__); goto out; } - ret = of_property_read_u32_array(np, - "max-clock-frequency-hz", clkfreq, cnt); + ret = of_property_read_u32_array(np, "freq-table-hz", + clkfreq, sz); if (ret && (ret != -EINVAL)) { - dev_err(dev, "%s: invalid max-clock-frequency-hz property, %d\n", - __func__, ret); - goto out; + dev_err(dev, "%s: error reading array %d\n", + "freq-table-hz", ret); + goto free_clkfreq; } - for (i = 0; i < cnt; i++) { + for (i = 0; i < sz; i += 2) { ret = of_property_read_string_index(np, - "clock-names", i, (const char **)&name); + "clock-names", i/2, (const char **)&name); if (ret) - goto out; + goto free_clkfreq; clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); if (!clki) { ret = -ENOMEM; - goto out; + goto free_clkfreq; } - clki->max_freq = clkfreq[i]; + clki->min_freq = clkfreq[i]; + clki->max_freq = clkfreq[i+1]; clki->name = kstrdup(name, GFP_KERNEL); + dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", + clki->min_freq, clki->max_freq, clki->name); list_add_tail(&clki->list, &hba->clk_list_head); } -out: +free_clkfreq: kfree(clkfreq); +out: return ret; } diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 93c7c82..2caa27e 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -209,6 +209,7 @@ struct ufs_dev_cmd { * @clk: clock node * @name: clock name * @max_freq: maximum frequency supported by the clock + * @min_freq: min frequency that can be used for clock scaling * @enabled: variable to check against multiple enable/disable */ struct ufs_clk_info { @@ -216,6 +217,7 @@ struct ufs_clk_info { struct clk *clk; const char *name; u32 max_freq; + u32 min_freq; bool enabled; };