From patchwork Tue Sep 9 15:36:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 4871271 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 28588C0338 for ; Tue, 9 Sep 2014 15:38:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BCA9A20172 for ; Tue, 9 Sep 2014 15:38:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A9D120170 for ; Tue, 9 Sep 2014 15:38:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756835AbaIIPgx (ORCPT ); Tue, 9 Sep 2014 11:36:53 -0400 Received: from smtp.codeaurora.org ([198.145.11.231]:51396 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756704AbaIIPgv (ORCPT ); Tue, 9 Sep 2014 11:36:51 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 3001A140C57; Tue, 9 Sep 2014 15:36:51 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 205DC140C74; Tue, 9 Sep 2014 15:36:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from galak-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: galak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 10078140C57; Tue, 9 Sep 2014 15:36:50 +0000 (UTC) From: Kumar Gala To: Tejun Heo , Hans de Goede Cc: Kumar Gala , linux-ide@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com Subject: [PATCH v4 2/3] ata: Add Qualcomm ARM SoC AHCI SATA host controller driver Date: Tue, 9 Sep 2014 10:36:47 -0500 Message-Id: <1410277008-20242-2-git-send-email-galak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1410277008-20242-1-git-send-email-galak@codeaurora.org> References: <1410277008-20242-1-git-send-email-galak@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for the Qualcomm AHCI SATA controller that exists on several SoC and specifically the IPQ806x family of chips. The IPQ806x SATA support requires the associated IPQ806x SATA PHY Driver to be enabled as well. Signed-off-by: Kumar Gala --- (reposted with Hans on list) v4: * Added simple PM ops implementation * Added setting of pmalive clk v3: * Added comment about suspend/resume not supported * Fixup ahci_platform_init_host for upstream change to interface * cleanup error handling of rxoob clk, moved to devm_clk_get/put v2: * Fixed MODULE_LICENSE to be GPL v2 drivers/ata/Kconfig | 10 +++++ drivers/ata/Makefile | 1 + drivers/ata/ahci_qcom.c | 99 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 110 insertions(+) create mode 100644 drivers/ata/ahci_qcom.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index e1b9278..165d2fa 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -133,6 +133,16 @@ config AHCI_MVEBU If unsure, say N. +config AHCI_QCOM + tristate "Qualcomm AHCI SATA support" + depends on ARCH_QCOM + help + This option enables support for AHCI SATA controller + integrated into Qualcomm ARM SoC chipsets. For more + information please refer to http://www.qualcomm.com/chipsets. + + If unsure, say N. + config AHCI_SUNXI tristate "Allwinner sunxi AHCI SATA support" depends on ARCH_SUNXI diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index ae41107..812435c 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o +obj-$(CONFIG_AHCI_QCOM) += ahci_qcom.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_ST) += ahci_st.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_TEGRA) += ahci_tegra.o libahci.o libahci_platform.o diff --git a/drivers/ata/ahci_qcom.c b/drivers/ata/ahci_qcom.c new file mode 100644 index 0000000..3da0c94 --- /dev/null +++ b/drivers/ata/ahci_qcom.c @@ -0,0 +1,99 @@ +/* + * Qualcomm ARM SoC AHCI SATA platform driver + * + * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov + * + * Copyright (c) 2014, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "ahci.h" + +static const struct ata_port_info qcom_ahci_port_info = { + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_platform_ops, +}; + +static int qcom_ahci_probe(struct platform_device *pdev) +{ + struct ahci_host_priv *hpriv; + struct clk *rxoob_clk, *pmalive_clk; + int rc; + + hpriv = ahci_platform_get_resources(pdev); + if (IS_ERR(hpriv)) + return PTR_ERR(hpriv); + + /* Try and set the rxoob clk to 100Mhz */ + rxoob_clk = of_clk_get_by_name(pdev->dev.of_node, "rxoob"); + if (IS_ERR(rxoob_clk)) + return PTR_ERR(rxoob_clk); + + rc = clk_set_rate(rxoob_clk, 100000000); + if (rc) + return rc; + + /* Try and set the pmalive clk to 100Mhz */ + pmalive_clk = of_clk_get_by_name(pdev->dev.of_node, "pmalive"); + if (IS_ERR(pmalive_clk)) + return PTR_ERR(pmalive_clk); + + rc = clk_set_rate(pmalive_clk, 100000000); + if (rc) + return rc; + + rc = ahci_platform_enable_resources(hpriv); + if (rc) + return rc; + + rc = ahci_platform_init_host(pdev, hpriv, &qcom_ahci_port_info); + if (rc) + goto disable_resources; + + return 0; +disable_resources: + ahci_platform_disable_resources(hpriv); + return rc; +} + +static const struct of_device_id qcom_ahci_of_match[] = { + { .compatible = "qcom,msm-ahci", }, + {}, +}; +MODULE_DEVICE_TABLE(of, qcom_ahci_of_match); + +static SIMPLE_DEV_PM_OPS(qcom_ahci_pm_ops, ahci_platform_suspend, + ahci_platform_resume); + +static struct platform_driver qcom_ahci_driver = { + .probe = qcom_ahci_probe, + .remove = ata_platform_remove_one, + .driver = { + .name = "qcom_ahci_qcom", + .owner = THIS_MODULE, + .of_match_table = qcom_ahci_of_match, + .pm = &qcom_ahci_pm_ops, + }, +}; +module_platform_driver(qcom_ahci_driver); + +MODULE_DESCRIPTION("Qualcomm AHCI SATA platform driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("ahci:qcom");