From patchwork Mon Nov 17 18:39:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephane Viau X-Patchwork-Id: 5323131 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 226A79F2ED for ; Mon, 17 Nov 2014 18:40:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3BF232015A for ; Mon, 17 Nov 2014 18:40:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2F5652012B for ; Mon, 17 Nov 2014 18:40:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751647AbaKQSkF (ORCPT ); Mon, 17 Nov 2014 13:40:05 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:46946 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751626AbaKQSkE (ORCPT ); Mon, 17 Nov 2014 13:40:04 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 0E7301406C5; Mon, 17 Nov 2014 18:40:03 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id F20B614082E; Mon, 17 Nov 2014 18:40:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from yyzubuntu31.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sviau@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D103C1406C5; Mon, 17 Nov 2014 18:40:01 +0000 (UTC) From: Stephane Viau To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robdclark@gmail.com, Stephane Viau Subject: [PATCH] drm/msm/mdp5: get the core clock rate from MDP5 config Date: Mon, 17 Nov 2014 13:39:34 -0500 Message-Id: <1416249574-22940-1-git-send-email-sviau@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The core clock rate depends on the hw configuration. Once we have read the hardware revision, we can set the core clock to its maximum value. Before then, the clock is set at a rate supported by all MDP5 revisions. Signed-off-by: Stephane Viau --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 9 +++++---- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 3 ++- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c index 1bb3a28..f2c15bd 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c @@ -62,6 +62,7 @@ static const struct mdp5_config msm8x74_config = { .count = 4, .base = { 0x12500, 0x12700, 0x12900, 0x12b00 }, }, + .max_clk = 200000000, }; static const struct mdp5_config apq8084_config = { @@ -99,6 +100,7 @@ static const struct mdp5_config apq8084_config = { .count = 5, .base = { 0x12500, 0x12700, 0x12900, 0x12b00, 0x12d00 }, }, + .max_clk = 320000000, }; struct mdp5_config_entry { @@ -420,12 +422,13 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev) if (ret) goto fail; - ret = clk_set_rate(mdp5_kms->src_clk, config->max_clk); - ret = mdp5_select_hw_cfg(kms); if (ret) goto fail; + /* TODO: compute core clock rate at runtime */ + clk_set_rate(mdp5_kms->src_clk, mdp5_kms->hw_cfg->max_clk); + /* make sure things are off before attaching iommu (bootloader could * have left things on, in which case we'll start getting faults if * we don't disable): @@ -486,8 +489,6 @@ static struct mdp5_platform_config *mdp5_get_config(struct platform_device *dev) /* TODO */ #endif config.iommu = iommu_domain_alloc(&platform_bus_type); - /* TODO hard-coded in downstream mdss, but should it be? */ - config.max_clk = 200000000; /* TODO get from DT: */ config.smp_blk_cnt = 22; diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h index c91101d..bdbdcda 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h @@ -37,6 +37,8 @@ struct mdp5_config { struct mdp5_sub_block dspp; struct mdp5_sub_block ad; struct mdp5_sub_block intf; + + uint32_t max_clk; }; extern const struct mdp5_config *mdp5_cfg; #include "mdp5.xml.h" @@ -78,7 +80,6 @@ struct mdp5_kms { /* platform config data (ie. from DT, or pdata) */ struct mdp5_platform_config { struct iommu_domain *iommu; - uint32_t max_clk; int smp_blk_cnt; };