From patchwork Tue Dec 2 17:39:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 5422061 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4F81ABEEBA for ; Tue, 2 Dec 2014 17:40:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 67E41202A1 for ; Tue, 2 Dec 2014 17:40:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4AE78202F2 for ; Tue, 2 Dec 2014 17:40:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754458AbaLBRkb (ORCPT ); Tue, 2 Dec 2014 12:40:31 -0500 Received: from mail-pd0-f178.google.com ([209.85.192.178]:62439 "EHLO mail-pd0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754425AbaLBRk3 (ORCPT ); Tue, 2 Dec 2014 12:40:29 -0500 Received: by mail-pd0-f178.google.com with SMTP id g10so13685149pdj.9 for ; Tue, 02 Dec 2014 09:40:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QdZTYdtWIxPMoMz4RNrBrZ9B84hzq+gOKuTlEcH6ZVo=; b=cMhS+GedTEoo2aQWUzb0JSOhUoGzMnn2FVD5r6XtWPWll1epgqwjNQjB//lI721rXq ajK712IQiApQR6L0eTExFNsyTJhIVVSVwaxZpWVT7vCLEuVQxR0FooF1ymkptSm68VYD 6d9V5ZeGJqtgEZuDq3hcgNRoPxp675o7S1V56+e1j1Oy/A+lWdZBEPwZw3F4KFiugbxW Il432SGodkOxwLoUW7A8RsTU5CmcMEmsXNLieYySdKoMFv5VNYajtHOidiQGngAytdlj rcsTzkb2q/4HHguD394rTAGGHIIhcnYofvzUWIG4oFo9CFIald9Demmg0D/QYLURuAIy Rmag== X-Gm-Message-State: ALoCoQk40wiOPDfUkhrK+IsSsRqGekJyoEaKvaXnDt4oO9CTiRWgrt7NcJRjJGtWkJNuBSM54Nnz X-Received: by 10.66.157.137 with SMTP id wm9mr618909pab.17.1417542028118; Tue, 02 Dec 2014 09:40:28 -0800 (PST) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id q3sm20928900pdn.23.2014.12.02.09.40.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 02 Dec 2014 09:40:27 -0800 (PST) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, msivasub@codeaurora.org, devicetree@vger.kernel.org, Lina Iyer Subject: [PATCH v14 02/10] qcom: scm: Add SCM warmboot support for quad core SoCs Date: Tue, 2 Dec 2014 10:39:10 -0700 Message-Id: <1417541958-56907-3-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1417541958-56907-1-git-send-email-lina.iyer@linaro.org> References: <1417541958-56907-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Quad core SoCs like APQ8074, APQ8064, APQ8084 need SCM support set up warm boot addresses in the Secure Monitor. Extend the SCM flags to support warm boot addresses for secondary cores. We do not need to export the warmboot flags. Move them into the implementation file. Signed-off-by: Lina Iyer Acked-by: Daniel Lezcano Reviewed-by: Stephen Boyd --- drivers/soc/qcom/scm-boot.c | 35 +++++++++++++++++++++++++++++++++++ include/soc/qcom/scm-boot.h | 3 +-- 2 files changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/soc/qcom/scm-boot.c b/drivers/soc/qcom/scm-boot.c index 60ff7b4..f653217a 100644 --- a/drivers/soc/qcom/scm-boot.c +++ b/drivers/soc/qcom/scm-boot.c @@ -21,6 +21,23 @@ #include #include +#define SCM_FLAG_WARMBOOT_CPU0 0x04 +#define SCM_FLAG_WARMBOOT_CPU1 0x02 +#define SCM_FLAG_WARMBOOT_CPU2 0x10 +#define SCM_FLAG_WARMBOOT_CPU3 0x40 + +struct scm_warmboot { + int flag; + void *entry; +}; + +static struct scm_warmboot scm_flags[] = { + { .flag = SCM_FLAG_WARMBOOT_CPU0 }, + { .flag = SCM_FLAG_WARMBOOT_CPU1 }, + { .flag = SCM_FLAG_WARMBOOT_CPU2 }, + { .flag = SCM_FLAG_WARMBOOT_CPU3 }, +}; + /* * Set the cold/warm boot address for one of the CPU cores. */ @@ -37,3 +54,21 @@ int scm_set_boot_addr(phys_addr_t addr, int flags) &cmd, sizeof(cmd), NULL, 0); } EXPORT_SYMBOL(scm_set_boot_addr); + +int scm_set_warm_boot_addr(void *entry, int cpu) +{ + int ret; + + /* + * Reassign only if we are switching from hotplug entry point + * to cpuidle entry point or vice versa. + */ + if (entry == scm_flags[cpu].entry) + return 0; + + ret = scm_set_boot_addr(virt_to_phys(entry), scm_flags[cpu].flag); + if (!ret) + scm_flags[cpu].entry = entry; + + return ret; +} diff --git a/include/soc/qcom/scm-boot.h b/include/soc/qcom/scm-boot.h index 6aabb24..529f55a 100644 --- a/include/soc/qcom/scm-boot.h +++ b/include/soc/qcom/scm-boot.h @@ -16,9 +16,8 @@ #define SCM_FLAG_COLDBOOT_CPU1 0x01 #define SCM_FLAG_COLDBOOT_CPU2 0x08 #define SCM_FLAG_COLDBOOT_CPU3 0x20 -#define SCM_FLAG_WARMBOOT_CPU0 0x04 -#define SCM_FLAG_WARMBOOT_CPU1 0x02 int scm_set_boot_addr(phys_addr_t addr, int flags); +int scm_set_warm_boot_addr(void *entry, int cpu); #endif