From patchwork Wed Dec 24 16:42:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kenneth Westfield X-Patchwork-Id: 5539961 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7B60FBEEA8 for ; Wed, 24 Dec 2014 16:42:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A91B5201EF for ; Wed, 24 Dec 2014 16:42:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A7A2D201FB for ; Wed, 24 Dec 2014 16:42:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752008AbaLXQmc (ORCPT ); Wed, 24 Dec 2014 11:42:32 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:55162 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751736AbaLXQma (ORCPT ); Wed, 24 Dec 2014 11:42:30 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 7413213FAE7; Wed, 24 Dec 2014 16:42:30 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 65F4D13FB15; Wed, 24 Dec 2014 16:42:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: kwestfie@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id F193113FAE7; Wed, 24 Dec 2014 16:42:29 +0000 (UTC) From: Kenneth Westfield To: Mark Brown , Takashi Iwai , Liam Girdwood , David Brown , Bryan Huntsman , Greg KH , Banajit Goswami , Patrick Lai Cc: ALSA Mailing List , MSM Mailing List , Device Tree Mailing List , Kenneth Westfield Subject: [Patch V3 03/10] ASoC: qcom: Document LPASS CPU bindings Date: Wed, 24 Dec 2014 08:42:03 -0800 Message-Id: <1419439330-2303-4-git-send-email-kwestfie@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1419439330-2303-1-git-send-email-kwestfie@codeaurora.org> References: <1419439330-2303-1-git-send-email-kwestfie@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kenneth Westfield Add documentation to the sound directory of the device-tree bindings for the IPQ806x LPASS CPU DAI driver. Signed-off-by: Kenneth Westfield Acked-by: Banajit Goswami --- .../bindings/sound/qcom,lpass-cpu-mi2s.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu-mi2s.txt diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu-mi2s.txt b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu-mi2s.txt new file mode 100644 index 0000000000000000000000000000000000000000..b411adffb8ce8759ba70334e30b597206735b25f --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu-mi2s.txt @@ -0,0 +1,42 @@ +* Qualcomm Technologies IPQ806x LPASS DAI + +This node models the Qualcomm Technologies IPQ806x LPASS MI2S DAI port. + +Required properties: +- compatible: "qcom,lpass-cpu-mi2s" +- clocks : A list of clock specifiers for the audio interface + * AHBIX bus clock + * MI2S OSR clock + * MI2S Bit clock +- clock-names : A list of audio interface clock names + * ahbix_clk + * mi2s_osr_clk + * mi2s_bit_clk +- ahbix-frequency : Specifies AHBIX bus clock frequency +- interrupts : Phandle to the LPASS audio interface interrupt +- interrupt-names : The name of the LPASS audio interface interrupt + * lpass-lpaif-irq +- pinctrl-names : A list of names indicating the state of the MI2S pins + * default + * idle +- pinctrl-0 : The default state of the MI2S pins +- pinctrl-1 : The idle state of the MI2S pins +- reg : Address space for the LPASS audio interface registers +- reg-names : The name of the LPASS audio interface register address space + * lpass-lpaif-mem + +Example: + +lpass-cpu-mi2s { + compatible = "qcom,lpass-cpu-mi2s"; + clocks = <&lcc AHBIX_CLK>, <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>; + clock-names = "ahbix_clk", "mi2s_osr_clk", "mi2s_bit_clk"; + ahbix-clkfrq = <300000>; + interrupts = <0 85 1>; + interrupt-names = "lpass-lpaif-irq"; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&mi2s_default>; + pinctrl-1 = <&mi2s_idle>; + reg = <0x28100000 0x10000>; + reg-names = "lpass-lpaif-mem"; +};