From patchwork Tue Jan 27 04:08:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Narendran Rajan X-Patchwork-Id: 5714351 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 794D19F1D6 for ; Tue, 27 Jan 2015 04:09:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B3103201DD for ; Tue, 27 Jan 2015 04:08:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D70602018E for ; Tue, 27 Jan 2015 04:08:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753073AbbA0EI5 (ORCPT ); Mon, 26 Jan 2015 23:08:57 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:54330 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752302AbbA0EI5 (ORCPT ); Mon, 26 Jan 2015 23:08:57 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id C550D13F8FC; Tue, 27 Jan 2015 04:08:56 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id B0AD313F95F; Tue, 27 Jan 2015 04:08:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: nrajan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4C56D13F8FC; Tue, 27 Jan 2015 04:08:56 +0000 (UTC) From: Narendran Rajan To: Zhang Rui , Eduardo Valentin Cc: Linux ARM MSM , Linux PM , Narendran Rajan Subject: [PATCH] dt-bindings: document qcom tsens thermal Date: Mon, 26 Jan 2015 20:08:07 -0800 Message-Id: <1422331687-19535-1-git-send-email-nrajan@codeaurora.org> X-Mailer: git-send-email 2.2.2 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding documentation for the QCOM tsens device tree node --- .../devicetree/bindings/thermal/qcom-thermal.txt | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/qcom-thermal.txt diff --git a/Documentation/devicetree/bindings/thermal/qcom-thermal.txt b/Documentation/devicetree/bindings/thermal/qcom-thermal.txt new file mode 100644 index 0000000..d2e99d6 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/qcom-thermal.txt @@ -0,0 +1,58 @@ +* QCOM SoC Temperature Sensor (TSENS) + +Required properties: +- compatible : "qcom,ipq806x-tsens" +- interrupts : The interrupt number to the cpu. The interrupt specifier format + depends on the interrupt controller. +- qcom,imem : Must contain phandle to imem syscon node +- qcom,tsens-base : Must contain phandle to clock controller node +- qcom,calib-offsets : Must contain offsets to primary and secondary + calibration data within imem +- qcom,tsens-slopes : Must contain slope value for each of the sensors controlled + by this device +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. + +Exiample: +tsens: tsens-msm8960 { + compatible = "qcom,ipq806x-tsens"; + interrupts = <0 178 1>; + qcom,imem = <&imem>; + qcom,tsens-base = <&gcc>; + qcom,calib-offsets = <0x400 0x410>; + qcom,tsens-slopes = <1176 1176 1154 1176 1111 + 1132 1132 1199 1132 1199 + 1132>; + #thermal-sensor-cells = <1>; + }; + +Example: referring to thermal sensors: +thermal-zones { + cpu_thermal: cpu_thermal { + polling-delay-passive = <1000>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + /* sensor ID */ + thermal-sensors = <&tsens 1>; + + trips { + cpu_alert0: cpu_alert { + temperature = <80000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <120000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +};