From patchwork Thu Feb 5 20:53:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kenneth Westfield X-Patchwork-Id: 5786931 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D82DC9F302 for ; Thu, 5 Feb 2015 20:54:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 680F0202EC for ; Thu, 5 Feb 2015 20:54:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B4C18202FE for ; Thu, 5 Feb 2015 20:54:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753817AbbBEUyN (ORCPT ); Thu, 5 Feb 2015 15:54:13 -0500 Received: from smtp.codeaurora.org ([198.145.11.231]:38413 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753338AbbBEUyH (ORCPT ); Thu, 5 Feb 2015 15:54:07 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 3C7D114037D; Thu, 5 Feb 2015 20:54:07 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 2E8C1140389; Thu, 5 Feb 2015 20:54:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: kwestfie@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A3382140388; Thu, 5 Feb 2015 20:54:06 +0000 (UTC) From: Kenneth Westfield To: Mark Brown , Takashi Iwai , Liam Girdwood , David Brown , Bryan Huntsman , Greg KH , Banajit Goswami , Patrick Lai Cc: ALSA Mailing List , Device Tree Mailing List , MSM Mailing List , Kenneth Westfield Subject: [Patch V4 03/10] ASoC: qcom: Document LPASS CPU bindings Date: Thu, 5 Feb 2015 12:53:39 -0800 Message-Id: <1423169626-22166-4-git-send-email-kwestfie@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1423169626-22166-1-git-send-email-kwestfie@codeaurora.org> References: <1423169626-22166-1-git-send-email-kwestfie@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kenneth Westfield Add documentation to the sound directory of the device-tree bindings for the IPQ806x LPASS CPU DAI device. Signed-off-by: Kenneth Westfield Acked-by: Banajit Goswami --- .../devicetree/bindings/sound/qcom,lpass-cpu.txt | 66 ++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt new file mode 100644 index 0000000000000000000000000000000000000000..7406ae52aec196f136883eb01afbc6c425bdc465 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt @@ -0,0 +1,66 @@ +* Qualcomm Technologies LPASS CPU DAI + +This node models the Qualcomm Technologies LPASS DAI ports. + +Required properties: + +- compatible : "qcom,lpass-cpu" +- clocks : Must contain an entry for each entry in clock-names. +- clock-names : A list which must include the following entries: + * "ahbix-clk" + * "mi2s-osr-clk" + * "mi2s-bit-clk" +- interrupts : Must contain an entry for each entry in + interrupt-names. +- interrupt-names : A list which must include the following entries: + * "lpass-irq-lpaif" +- pinctrl-N : One property must exist for each entry in + pinctrl-names. See ../pinctrl/pinctrl-bindings.txt + for details of the property values. +- pinctrl-names : Must contain a "default" entry. +- reg : Must contain an address for each entry in reg-names. +- reg-names : A list which must include the following entries: + * "lpass-lpaif" + * "lpass-lpm" + +Optional properties: + +- qcom,system-clock-shift : Add this bool property if the default + frequency of the system clock needs to + be reduced. +- qcom,system-clock-shift-compare : A numerical value used to right-shift + the default system clock frequency for + comparison with the target bit clock + frequency. +- qcom,system-clock-shift-amount : A numerical value used to right-shift + the default system clock frequency. +- qcom,alternate-sysclk : Add this bool property if the default + frequency of the system clock cannot + divide down to the target bit clock + frequency. +- qcom,alternate-sysclk-bitwidth : A numerical value representing the + sample bitwidth which requires use of + the alternate system clock frequency. +- qcom,alternate-sysclk-frequency : A numerical value representing the new + system clock frequency to use. + +Example: + +lpass-cpu@28100000 { + compatible = "qcom,lpass-cpu"; + clocks = <&lcc AHBIX_CLK>, <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>; + clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk"; + interrupts = <0 85 1>; + interrupt-names = "lpass-irq-lpaif"; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&mi2s_default>; + pinctrl-1 = <&mi2s_idle>; + reg = <0x28100000 0x10000>, <0x28400000 0x4000>; + reg-names = "lpass-lpaif", "lpass-lpm"; + qcom,system-clock-shift; + qcom,system-clock-shift-compare = <4>; + qcom,system-clock-shift-amount = <3>; + qcom,alternate-sysclk; + qcom,alternate-systclk-bitwidth = <24>; + qcom,alternate-systclk-frequency = <4608000>; +};