From patchwork Wed Mar 4 19:33:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 5939291 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CB5E79F695 for ; Wed, 4 Mar 2015 19:34:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E44CF202FE for ; Wed, 4 Mar 2015 19:34:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DD37720320 for ; Wed, 4 Mar 2015 19:34:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758308AbbCDTdv (ORCPT ); Wed, 4 Mar 2015 14:33:51 -0500 Received: from mout.kundenserver.de ([212.227.126.130]:54406 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759263AbbCDTdt (ORCPT ); Wed, 4 Mar 2015 14:33:49 -0500 Received: from wuerfel.lan. ([149.172.15.242]) by mrelayeu.kundenserver.de (mreue003) with ESMTPSA (Nemesis) id 0MH3Li-1YFVXZ40cU-00DlgV; Wed, 04 Mar 2015 20:33:44 +0100 From: Arnd Bergmann To: linux-arm-msm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, David Brown , Daniel Walker , Bryan Huntsman , Stephen Boyd , Tim Bird , Bjorn Andersson , Linus Walleij , linux-kernel@vger.kernel.org, Greg Kroah-Hartman , Ulf Hansson , Arnd Bergmann Subject: [RFC PATCH 14/18] ARM: msm: pass gpio irq range as resource Date: Wed, 4 Mar 2015 20:33:08 +0100 Message-Id: <1425497592-1831064-15-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 2.1.0.rc2 In-Reply-To: <1425497592-1831064-1-git-send-email-arnd@arndb.de> References: <1425497592-1831064-1-git-send-email-arnd@arndb.de> X-Provags-ID: V03:K0:i8Ky0Fy7A/etY0UhuVgxGHlGrhR76FgrFH3UrdOdh8Vyhq9BvSs 3TG/zF3lH8fJWhfXr0/zAdk+T0wZ4Ahgw4/2QseVRnEodpNxV0VjDQwL03asFkYaf2nSq9D glzpxgI14aIiI+i/7qKQXaHNGhdA1JsoY1lYvgDbBrn5Yt0lvb0D+lOheYg4HKmQ2GqsIk2 lqpH7B87YDEk4pluT/7Zg== X-UI-Out-Filterresults: notjunk:1; Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The IRQ numbers that are used by the gpio driver are hardware specific, and since this driver does not use irq domains, we have to pass them as platform resources in order to perform gpio configuration at runtime. Signed-off-by: Arnd Bergmann --- arch/arm/mach-msm/devices-msm7x00.c | 5 +++++ arch/arm/mach-msm/devices-msm7x30.c | 5 +++++ arch/arm/mach-msm/devices-qsd8x50.c | 5 +++++ arch/arm/mach-msm/gpio-msm-v1.c | 15 +++++++++------ 4 files changed, 24 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-msm/devices-msm7x00.c b/arch/arm/mach-msm/devices-msm7x00.c index b7308e7a301b..38c16313f433 100644 --- a/arch/arm/mach-msm/devices-msm7x00.c +++ b/arch/arm/mach-msm/devices-msm7x00.c @@ -99,6 +99,11 @@ static struct resource msm_gpio_resources[] = { .flags = IORESOURCE_IRQ, }, { + .start = NR_MSM_IRQS, + .end = NR_MSM_IRQS + NR_GPIO_IRQS - 1, + .flags = IORESOURCE_IRQ, + }, + { .start = 0xa9200800, .end = 0xa9200800 + SZ_4K - 1, .flags = IORESOURCE_MEM, diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c index 2d36c54b9523..197d2b8afa20 100644 --- a/arch/arm/mach-msm/devices-msm7x30.c +++ b/arch/arm/mach-msm/devices-msm7x30.c @@ -80,6 +80,11 @@ static struct resource msm_gpio_resources[] = { .flags = IORESOURCE_IRQ, }, { + .start = NR_MSM_IRQS, + .end = NR_MSM_IRQS + NR_GPIO_IRQS - 1, + .flags = IORESOURCE_IRQ, + }, + { .start = 0xac001000, .end = 0xac001000 + SZ_4K - 1, .flags = IORESOURCE_MEM, diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c index 5f280467f207..3fd28b702591 100644 --- a/arch/arm/mach-msm/devices-qsd8x50.c +++ b/arch/arm/mach-msm/devices-qsd8x50.c @@ -90,6 +90,11 @@ static struct resource msm_gpio_resources[] = { .flags = IORESOURCE_IRQ, }, { + .start = NR_MSM_IRQS, + .end = NR_MSM_IRQS + NR_GPIO_IRQS - 1, + .flags = IORESOURCE_IRQ, + }, + { .start = 0xa9000800, .end = 0xa9000800 + SZ_4K - 1, .flags = IORESOURCE_MEM, diff --git a/arch/arm/mach-msm/gpio-msm-v1.c b/arch/arm/mach-msm/gpio-msm-v1.c index 589115c1faa2..2700f9bda455 100644 --- a/arch/arm/mach-msm/gpio-msm-v1.c +++ b/arch/arm/mach-msm/gpio-msm-v1.c @@ -274,7 +274,7 @@ #define MSM7X30_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0xE0) #define MSM7X30_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x234) -#define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0) +static int msm_gpio_first_irq; #define MSM_GPIO_BANK(soc, bank, first, last) \ { \ @@ -446,7 +446,7 @@ static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset) { - return MSM_GPIO_TO_INT(chip->base + offset); + return chip->base + offset - msm_gpio_first_irq; } static int msm_gpio_request(struct gpio_chip *chip, unsigned offset) @@ -618,9 +618,9 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) j = fls(mask) - 1; /* printk("%s %08x %08x bit %d gpio %d irq %d\n", __func__, v, m, j, msm_chip->chip.start + j, - FIRST_GPIO_IRQ + msm_chip->chip.start + j); */ + msm_gpio_first_irq + msm_chip->chip.start + j); */ val &= ~mask; - generic_handle_irq(FIRST_GPIO_IRQ + + generic_handle_irq(msm_gpio_first_irq + msm_chip->chip.base + j); } } @@ -668,8 +668,11 @@ static int gpio_msm_v1_probe(struct platform_device *pdev) if (IS_ERR(base2)) return PTR_ERR(base2); - for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) { - if (i - FIRST_GPIO_IRQ >= + res = platform_get_resource(pdev, IORESOURCE_IRQ, 2); + msm_gpio_first_irq = res->start; + + for (i = msm_gpio_first_irq; i <= res->end; i++) { + if (i - msm_gpio_first_irq >= msm_gpio_chips[j].chip.base + msm_gpio_chips[j].chip.ngpio) j++;