From patchwork Tue Mar 17 21:51:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 6034661 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 82123BF90F for ; Tue, 17 Mar 2015 21:51:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC28B20480 for ; Tue, 17 Mar 2015 21:51:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 48C2E2049D for ; Tue, 17 Mar 2015 21:51:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753778AbbCQVv3 (ORCPT ); Tue, 17 Mar 2015 17:51:29 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:50767 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752392AbbCQVv2 (ORCPT ); Tue, 17 Mar 2015 17:51:28 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 525E11408A3; Tue, 17 Mar 2015 21:51:28 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 4062E1408A5; Tue, 17 Mar 2015 21:51:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: agross@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B34E41408A3; Tue, 17 Mar 2015 21:51:27 +0000 (UTC) From: Andy Gross To: Kumar Gala Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Andy Gross Subject: [PATCH 1/4] ARM: DT: ipq8064: Add ADM device node Date: Tue, 17 Mar 2015 16:51:08 -0500 Message-Id: <1426629071-3541-2-git-send-email-agross@codeaurora.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1426629071-3541-1-git-send-email-agross@codeaurora.org> References: <1426629071-3541-1-git-send-email-agross@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for the ADM DMA on the IPQ8064 SOC Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 4 ++++ arch/arm/boot/dts/qcom-ipq8064.dtsi | 23 +++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index 55b2910..7f9ea50 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -62,6 +62,10 @@ cs-gpios = <&qcom_pinmux 20 0>; + dmas = <&adm_dma 6>, + <&adm_dma 5>; + dma-names = "rx", "tx"; + flash: m25p80@0 { compatible = "s25fl256s1"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index cb225da..4108ac4 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -2,7 +2,10 @@ #include "skeleton.dtsi" #include +#include #include +#include + / { model = "Qualcomm IPQ8064"; @@ -279,5 +282,25 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + adm_dma: dma@18300000 { + compatible = "qcom,adm"; + reg = <0x18300000 0x100000>; + interrupts = ; + #dma-cells = <1>; + + clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; + clock-names = "core", "iface"; + + resets = <&gcc ADM0_RESET>, + <&gcc ADM0_PBUS_RESET>, + <&gcc ADM0_C0_RESET>, + <&gcc ADM0_C1_RESET>, + <&gcc ADM0_C2_RESET>; + reset-names = "clk", "pbus", "c0", "c1", "c2"; + qcom,ee = <0>; + + status = "disabled"; + }; }; };