From patchwork Wed Mar 18 13:32:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 6039371 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2222CBF90F for ; Wed, 18 Mar 2015 13:40:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3C2FF204FB for ; Wed, 18 Mar 2015 13:40:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0F501204EC for ; Wed, 18 Mar 2015 13:40:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756435AbbCRNkR (ORCPT ); Wed, 18 Mar 2015 09:40:17 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:32927 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932960AbbCRNcF (ORCPT ); Wed, 18 Mar 2015 09:32:05 -0400 Received: by wixw10 with SMTP id w10so63978133wix.0 for ; Wed, 18 Mar 2015 06:32:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=egIVQVW3TFDB0zahhAShh3ANkDhlqpl6UYN4qAtwJdQ=; b=IpQz1764HNtwDLPpY9BugcxJDobHAz/r3E+3+CdVpzIoY0b3Ep0uUjAonA6ymkQiJT dacRbqgIhJlk68bELlWPt1i6m7kia560JFdKV26reuno+jvX7N3z5K2xfmUQXTpfzQfs d+9j+GzdEAmpsaX44T+8BIrG2TNNR0y7UGGAMGxpMrYmO1uzGJWA+NrshHDd7wy0MPCA Q8tCNAnJ+TAH1fUi5HL830Ptxfs9XZv3yvNJcysaOmoZ0OZPNEH4WJKpRHyYXe6UOCFB jnk+0X9NEZEzDyvJatZAOxV6Ri2pYK8tA3a+6pXZ3EPpPHaUNG4vY35dc+gbOAUGcFlp O+zg== X-Gm-Message-State: ALoCoQn+gDhGSBq//Ozjr/3kLJm1kHe6AsqviSmMjVtZa3I/NNK7DGJpp0EYuQzF5cmnkNKanSur X-Received: by 10.180.102.130 with SMTP id fo2mr6998193wib.30.1426685523887; Wed, 18 Mar 2015 06:32:03 -0700 (PDT) Received: from mms.wifi.mm-sol.com ([37.157.136.206]) by mx.google.com with ESMTPSA id cf12sm24531838wjb.10.2015.03.18.06.32.02 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 18 Mar 2015 06:32:03 -0700 (PDT) From: Georgi Djakov To: sboyd@codeaurora.org, mturquette@linaro.org Cc: galak@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v1 2/9] clk: qcom: Do some error handling in configure_bank() Date: Wed, 18 Mar 2015 15:32:08 +0200 Message-Id: <1426685535-25071-3-git-send-email-georgi.djakov@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1426685535-25071-1-git-send-email-georgi.djakov@linaro.org> References: <1426685535-25071-1-git-send-email-georgi.djakov@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently configure_bank() returns void. Add some error checking on the regmap calls and propagate if there is any error. Signed-off-by: Georgi Djakov --- drivers/clk/qcom/clk-rcg.c | 62 +++++++++++++++++++++++++++++--------------- 1 file changed, 41 insertions(+), 21 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index 59a093e56366..64d98c62459d 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c @@ -203,10 +203,10 @@ static u32 mn_to_reg(struct mn *mn, u32 m, u32 n, u32 val) return val; } -static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) +static int configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) { u32 ns, md, reg; - int bank, new_bank; + int bank, new_bank, ret; struct mn *mn; struct pre_div *p; struct src_sel *s; @@ -218,38 +218,55 @@ static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) enabled = __clk_is_enabled(hw->clk); - regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + if (ret) + return ret; bank = reg_to_bank(rcg, reg); new_bank = enabled ? !bank : bank; ns_reg = rcg->ns_reg[new_bank]; - regmap_read(rcg->clkr.regmap, ns_reg, &ns); + ret = regmap_read(rcg->clkr.regmap, ns_reg, &ns); + if (ret) + return ret; if (banked_mn) { mn = &rcg->mn[new_bank]; md_reg = rcg->md_reg[new_bank]; ns |= BIT(mn->mnctr_reset_bit); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; - regmap_read(rcg->clkr.regmap, md_reg, &md); + ret = regmap_read(rcg->clkr.regmap, md_reg, &md); + if (ret) + return ret; md = mn_to_md(mn, f->m, f->n, md); - regmap_write(rcg->clkr.regmap, md_reg, md); - + ret = regmap_write(rcg->clkr.regmap, md_reg, md); + if (ret) + return ret; ns = mn_to_ns(mn, f->m, f->n, ns); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; /* Two NS registers means mode control is in NS register */ if (rcg->ns_reg[0] != rcg->ns_reg[1]) { ns = mn_to_reg(mn, f->m, f->n, ns); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; } else { reg = mn_to_reg(mn, f->m, f->n, reg); - regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + if (ret) + return ret; } ns &= ~BIT(mn->mnctr_reset_bit); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; } if (banked_p) { @@ -259,13 +276,20 @@ static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) s = &rcg->s[new_bank]; ns = src_to_ns(s, s->parent_map[f->src], ns); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; if (enabled) { - regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + if (ret) + return ret; reg ^= BIT(rcg->mux_sel_bit); - regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + if (ret) + return ret; } + return 0; } static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) @@ -292,9 +316,7 @@ static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; f.src = index; - configure_bank(rcg, &f); - - return 0; + return configure_bank(rcg, &f); } /* @@ -567,9 +589,7 @@ static int __clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate) if (!f) return -EINVAL; - configure_bank(rcg, f); - - return 0; + return configure_bank(rcg, f); } static int clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate,